(Principal/Lead) SoC Design Verification Engineer

Thrive Recruitment Agency; Sunnyvale (CA); On-site; USD 150,000 - 200,000; Full time

Job summary

A leading recruitment agency is looking for a Principal/Lead SoC Design Verification Engineer in Sunnyvale, California. In this role, you will lead verification processes, manage teams, and work closely with hardware and software teams to ensure execution of verification plans. Ideal candidates will have leadership experience, expertise in pre-silicon verification environments, and strong skills in OVM, UVM, and System Verilog. This is an excellent opportunity for individuals passionate about complex SoC development and verification.

Qualifications

• 6+ years of relevant design verification and management experience.
• Experience in pre-silicon verification environments.
• Experience with PCIe, on-chip memory, ARM AXI, APB protocols.

Responsibilities

• Lead DV effort for verification and validation test plans.
• Manage and mentor a team of verification engineers.
• Work with design teams on critical milestones.

Skills

Leadership

Organizational skills

Collaboration

Communication

Python and scripting

Education

BSEE

Tools

OVM

UVM

System Verilog

High Level Synthesis

System C

Job description

(Principal/Lead) SoC Design Verification Engineer

Job Openings (Principal/Lead) SoC Design Verification Engineer

About the job (Principal/Lead) SoC Design Verification Engineer

As a SoC Design Verification Lead, you will be responsible to lead the DV effort for Celestial AI/ML SoC. You will be responsible for verification execution, driving efficiencies in verification strategy for an SoC from pre-silicon simulation through post-silicon validation and through the SoC production

You would have organizational leadership experience in supporting high-performance teams and processes, be a strategic problem-solver with demonstrated collaboration and communication skills.

Responsibilities

• Lead DV effort to define and review verification and validation testplans at block, IP and SoC
• Build, manage and mentor a team of ASIC/SoC verification engineers including managing external verification contractors/consultants.
• Work with ASIC/SoC design team to manage critical milestones and deliveries
• Work with Architecture, Design and Verification technical leads to shape the SoC verification methodologies and processes and to ensure DV reusability
• Work with software team to validate complete tool chain including running real world use cases on verification models
• Create coverage driven verification plans from specification, review and refine to achieve coverage targets
• Provide technical leadership through mentorship and strong teamwork

Requirements

• Natural leader who enjoys working with hardware and software development teams
• Excellent organization skills to prioritize requirements.
• Experience in pre-silicon verification with developing and maintaining complex SoC design verification environments in OVM, UVM and System Verilog -experience with High Level Synthesis and System C preferred
• Hands-on experience in execution of verification plans
• Successful tapeout of IP, CPU, GPU, AI/ML or any complex SoC development highly desirable.
• Prior verification experience in PCIe, on-chip memory, ARM AXI, APB protocols and on-chip NOC
• Experience in Python and scripting.
• Team player that proactively engages with cross functional engineering teams.
• Experience working with and directing external contractors and verification consultants
• BSEE + 6 years of relevant design verification and management experience