Principal Design Verification Engineer

Bright Vision Technologies; Santa Clara (CA); On-site; USD 158,600 - 317,800; Full time

Benefits offered by this job

Relocation Assistance Available

Visa Sponsorship Available

Job summary

Bright Vision Technologies in Santa Clara, CA is looking for a skilled Principal Design Verification Engineer. In this role, you will lead verification efforts for complex SoC designs using SystemVerilog and UVM. Candidates with 10+ years of experience in Design Verification and expertise in automation tools are encouraged to apply.

This position offers a competitive salary range of $158,600 to $317,800, along with relocation assistance and visa sponsorship. Join a forward-thinking company focused on innovation and career growth.

Qualifications

• 10+ years of Design Verification experience (or MS/PhD with 5+ years).
• Strong experience with SystemVerilog and UVM.
• Experience with SoC/ASIC verification and successful tape-outs.

Responsibilities

• Lead Design Verification efforts for complex SoC projects.
• Develop and maintain verification environments using SystemVerilog and UVM.
• Create verification test plans and drive coverage closure.

Skills

Design Verification

SystemVerilog

UVM

Python

Perl

Linux

C++

Object-Oriented Programming

ARM Assembly

Education

BS/MS/PhD in Computer Engineering, Electrical Engineering, or Computer Science

Tools

EDA verification tools

Job description

Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. We leverage cutting-edge technologies to create scalable, secure, and user-friendly applications.

As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.

This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.

Job Title: Principal Design Verification Engineer

Location: Santa Clara, CA (Onsite)

Salary: $158,600 - $317,800. Bonus + RSUs

Job Summary

We are seeking an experienced Principal Design Verification Engineer to lead verification activities for complex SoC/ASIC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and functional verification, along with a proven track record of successful SoC tape-outs.

Responsibilities

• Lead Design Verification efforts for complex SoC projects.
• Develop and maintain verification environments using SystemVerilog and UVM.
• Create verification test plans, develop tests, and drive coverage closure.
• Debug verification failures and work closely with design teams.
• Develop automation tools using Python or Perl.
• Support boot code verification and multi-core SoC validation.
• Mentor and lead verification engineers.

Required Skills

• 10+ years of Design Verification experience (or MS/PhD with 5+ years).
• Strong experience with SystemVerilog and UVM.
• Experience with SoC/ASIC verification and successful tape-outs.
• Expertise in constrained-random and coverage-driven verification.
• Python or Perl scripting experience.
• Experience with EDA verification tools.
• Strong Linux, C++, and Object-Oriented Programming skills.
• ARM Assembly experience preferred.

Education

• BS/MS/PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field.

Benefits

• Relocation Assistance Available
• Visa Sponsorship Available

Bright Vision Technologies is committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.

Equal Employment Opportunity (EEO) Statement

Bright Vision Technologies (BV Teck) is committed to equal employment opportunity (EEO) for all employees and applicants without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other protected status as defined by applicable federal, state, or local laws. This commitment extends to all aspects of employment, including recruitment, hiring, training, compensation, promotion, transfer, leaves of absence, termination, layoffs, and recall.

BV Teck expressly prohibits any form of workplace harassment or discrimination. Any improper interference with employees' ability to perform their job duties may result in disciplinary action up to and including termination of employment.