Principal IC Packaging Engineer

QUALCOMM, Inc.; San Diego (CA); On-site; USD 201,600 - 302,400; Full time

Benefits offered by this job

Competitive salary

Annual discretionary bonus

RSU grants

Comprehensive benefits package

Job summary

A leading tech company is seeking a highly motivated Principal IC Packaging Engineer to lead the development of advanced integrated circuit packaging technologies. This position demands extensive experience in packaging methods and the ability to manage multi-disciplinary teams. Applicants should possess at least 17 years of hands-on experience, preferably in 2.5D/3D packaging. The position offers competitive compensation ranging from $201,600 to $302,400, along with opportunities for bonuses and annual RSU grants.

Qualifications

• 17+ years of hands-on experience in packaging technology development, particularly in 2.5D/3D.
• Comprehensive understanding of semiconductor packaging trends and requirements.
• Capability to lead multi-functional teams and resolve complex technical challenges.

Responsibilities

• Lead the development of advanced packaging technologies.
• Manage product introductions and transition to high-volume manufacturing.
• Oversee collaboration with foundries and OSATs.

Skills

Leadership

Technical problem-solving

Communication skills

Project management

Collaboration

Education

M.S. or Ph.D. in Mechanical, Electrical, or Materials Engineering

Bachelor's degree in relevant field

Tools

Packaging technologies

Reliability standards

Failure analysis techniques

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Packaging Engineering

General Summary:

We are seeking a highly motivated Principal IC Packaging Engineer to lead the development of advanced integrated circuit (IC) packaging technologies. This role focuses on spearheading new product introductions for cutting‑edge package technologies, particularly targeting Data Center AI, Power Management, and emerging markets. The engineer will drive innovation from initial concept through to high‑volume manufacturing (HVM) at assembly suppliers. This position demands in‑depth expertise and experience in a variety of advanced packaging methods, including Redistribution Layer (RDL) packages, wafer bonding, flip chip, wire bond, and System in Package (SiP) assembly processes. Proficiency in materials and equipment relevant to these technologies is essential. Additionally, the role requires the ability to lead multi‑disciplinary teams, manage relationships with multiple Outsourced Semiconductor Assembly and Test (OSAT) providers, and resolve complex technical challenges that arise during development and manufacturing.

Principal Duties & Responsibilities:

• Provide leadership and take responsibility for the development of advanced packaging technologies, including wafer bonding, RDL, 3D, wafer dicing, and 2.5D packaging.
• Oversee new product introductions and ensure smooth transition to high‑volume manufacturing.
• Leverage subject matter expertise in package architecture, high‑density interconnect package design, as well as performance, reliability, and cost constraints.
• Apply hands‑on experience in packaging assembly processes, materials, equipment, and adherence to design rules.
• Collaborate with and manage multiple foundries and OSATs to advance packaging solutions from concept to full‑scale production.
• Lead cross‑functional teams and manage multiple concurrent programs.
• Resolve complex technical issues encountered throughout the development and manufacturing process.

Preferred Qualifications:

• M.S. or Ph.D. in Mechanical, Electrical, or Materials Engineering, or equivalent experience.
• Seventeen or more years of hands‑on experience in packaging technology development, specifically in 2.5D/3D for high‑density die‑to‑die (D2D) interconnects, RDL, fan‑out bridges, FCBGA, MCM, and related disciplines.
• Comprehensive understanding of semiconductor industry packaging trends, end‑user packaging requirements, and prior experience with high‑performance computing products.
• Familiarity with reliability standards, test methods, qualification procedures, and failure analysis techniques.
• Knowledge of substrate manufacturing processes and design rules.
• Excellent verbal and written communication skills.
• Demonstrated ability in organized technical project management.
• Ability to work independently and lead multiple programs simultaneously.
• Proven capability to lead multi‑functional teams and resolve complex technical problems.
• Familiarity with working alongside contract manufacturers (CM) on data center and rack design is considered an advantage.

Minimum Qualifications:

• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 8+ years of System/Package Design/Technology Engineering or related work experience.
• Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 7+ years of System/Package Design/Technology Engineering or related work experience.
• Ph.D. in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 6+ years of System/Package Design/Technology Engineering or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. For accommodation requests, email disability‑[e-mail] or call Qualcomm's toll‑free number found here.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$201,600.00 - $302,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer— and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.