Packaging SIPI Engineer, Sr. Staff

Qualcomm; San Diego (CA); On-site; USD 180,400 - 270,600; Full time

Job summary

The Qualcomm Package Electrical Team has an opening in signal integrity and power integrity. The candidate will work with package and IC designers to optimize the overall package design and perform system simulation to ensure all system level constraints are met prior to the package Tape-out.

The candidate is expected to communicate with PHY owners to understand IP specs and with PCB designers to assess the impact of ball assignment on system performance, while collaborating across PHY, Package,

Qualifications

• Bachelor’s degree with 6+ years of system/package design/technology engineering or related work experience.
• Master’s degree with 5+ years of system/package design/technology engineering or related work experience.
• PhD with 4+ years of system/package design/technology engineering or related work experience.

Responsibilities

• Perform package extraction for the time domain and frequency domain analysis.
• Perform system-level analysis for DDR, SerDes & mixed signal interfaces.
• Provide design guidelines for package design.
• Perform system simulation and provide feedback for design optimization.
• Develop design & analysis flow and automate the process.
• Create technical documentation and presentations.

Skills

Signal integrity

Power integrity

System simulation

Leadership

Communication with PHY and PCB teams

Education

Bachelor’s degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field

Master’s degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field

PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field

Tools

MATLAB

HFSS

Q3D

Sentinel-PSI

Clarity

ADS

HSPICE

Cadence Allegro

Mentor Xpedition

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > Packaging Engineering

General Summary

The Qualcomm Package Electrical Team has an opening in the areas of signal integrity and power integrity. The candidate will work with package and IC designers to find ways to optimize the overall package design and perform system simulation to make sure all system level constraints are met prior to the package Tape‑out. The candidate is expected to communicate with PHY owners to understand the specs for various IPs such as LPDDR, PCIe, UFS, USB, MIPI, etc., and with PCB designers to assess the impact of ball assignment to the system level performance. This position offers the opportunity to work across multiple organizations such as the PHY team, Package team, and PCB team, providing timely feedback and updating design guidelines to the team. The candidate is expected to work on auto products by leading several engineers located in multiple international geographies. This is a leadership position; the candidate should be able to work independently and provide technical guidelines to upper management for key decision‑making processes.

Responsibilities

• Perform package extraction for the time domain and frequency domain analysis.
• Perform system‑level analysis for DDR, SerDes & mixed signal interfaces.
• Provide design guidelines for package design.
• Perform system simulation and provide feedback for design optimization.
• Develop design & analysis flow and automate the process.
• Create technical documentation and presentations.

Minimum Qualifications

• Bachelor’s degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 6+ years of system/package design/technology engineering or related work experience.
• Master’s degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 5+ years of system/package design/technology engineering or related work experience.
• PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ years of system/package design/technology engineering or related work experience.

Preferred Qualifications

• Experience in AUTO package design and analysis.
• Ability to use AI to enhance team efficiency.
• Experience in SerDes design specifications such as PCIe Gen‑x, USB, UFS in server design.
• Experience in MATLAB to automate existing simulation flow.
• Experience in programming languages (C/C++) or scripting languages (Perl/Python) is a plus.
• Master’s degree or Ph.D. with 15+ years of experience.
• Prior management experience.
• 10 years of experience in DDR/SerDes in package/PCB/system design related to compute/server standards.
• Experience in electromagnetics and a solid background on transmission line theory & crosstalk.
• Proficiency in field solvers such as HFSS, Q3D, Sentinel‑PSI and Clarity.
• Experience in simulation tools such as ADS and HSPICE.
• Working knowledge in Cadence Allegro/APD/Sip or Mentor Xpedition.

Pay Range and Other Compensation & Benefits

$180,400.00 – $270,600.00

The above pay scale reflects the broad minimum to maximum range for this job code for the posted location. In addition to salary, Qualcomm offers a competitive annual discretionary bonus program and opportunities for annual RSU grants. Employees are also eligible for a highly competitive benefits package designed to support success at work, at home, and at play.

EEO Statement

Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the hiring process, Qualcomm is committed to providing an accessible process. Qualcomm also offers reasonable accommodations to support individuals with disabilities.