Principal Analog Design Engineer

Celero Communications, Inc.; Irvine (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Celero Communications, Inc. seeks an Analog Design Engineer to drive high-speed interconnect technology for AI infrastructure. You will architect, design, and deliver high-performance analog and mixed-signal circuits for transceivers and other critical high-speed functions from architecture through silicon.

You will join a world-class engineering team tackling challenging design problems in advanced process technologies, contributing to silicon bring-up, debug and documentation in Irvine, CA.

Qualifications

• Master's degree and/or PhD in Electrical Engineering with 5+ years of experience.
• Strong analog design fundamentals for broadband amplification, clock generation and distribution, and fundamental analog blocks.
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must; knowledge of CMOS design and verification flows.

Responsibilities

• High speed analog circuit design for broadband amplification (VGA, CTLE, DRV, etc.).
• Clock generation and distribution (VCOs, PLL, clock distribution).
• Design of fundamental analog blocks (bandgap references, LDOs, temp sensors).
• Design of next-gen optical transceiver approaches.
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design specification creation.

Skills

Analog circuit design

Clock generation & distribution

System verification

Analog layout supervision

Documentation & communication

Education

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Virtuoso

Spectre

ADE

Post-layout extraction tools

Job description

Are you an Analog Design Engineer passionate about building the high-speed interconnect technology powering the next generation of AI? Join our fast-growing semiconductor startup and help develop disruptive mixed-signal solutions that enable tomorrow's AI infrastructure. We are seeking experienced Analog Design Engineers to architect, design, and deliver high-performance analog and mixed-signal circuits for next-generation transceivers and other critical high-speed functions. This is an opportunity to work alongside a world-class engineering team, tackle challenging design problems in advanced process technologies, and make a direct impact on innovative products from architecture through silicon.

What You Will Do:

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver
• Design of custom passive components, from concept to silicon implementation
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation
• Silicon bring-up, debug and support
• Team communication and documentation

What You Will Bring:

• Master's degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience
• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must
• Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
• Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design
• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
• Strong communication and documentation skills

Annual Base Salary Range for US: $150,000 - $250,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)

Voluntary Self-Identification

For government reporting purposes, we ask candidates to respond to the below self-identification survey.Completion of the form is entirely voluntary. Whatever your decision, it will not be considered in the hiringprocess or thereafter. Any information that you do provide will be recorded and maintained in aconfidential file.

As set forth in Celero Communications, Inc.'s Equal Employment Opportunity policy,we do not discriminate on the basis of any protected group status under any applicable law.

If you believe you belong to any of the categories of protected veterans listed below, please indicate by making the appropriate selection.As a government contractor subject to the Vietnam Era Veterans Readjustment Assistance Act (VEVRAA), we request this information in order to measurethe effectiveness of the outreach and positive recruitment efforts we undertake pursuant to VEVRAA. Classification of protected categoriesis as follows:

A "disabled veteran" is one of the following: a veteran of the U.S. military, ground, naval or air service who is entitled to compensation (or who but for the receipt of military retired pay would be entitled to compensation) under laws administered by the Secretary of Veterans Affairs; or a person who was discharged or released from active duty because of a service-connected disability.

A "recently separated veteran" means any veteran during the three-year period beginning on the date of such veteran's discharge or release from active duty in the U.S. military, ground, naval, or air service.

An "active duty wartime or campaign badge veteran" means a veteran who served on active duty in the U.S. military, ground, naval or air service during a war, or in a campaign or expedition for which a campaign badge has been authorized under the laws administered by the Department of Defense.

An "Armed forces service medal veteran" means a veteran who, while serving on active duty in the U.S. military, ground, naval or air service, participated in a United States military operation for which an Armed Forces service medal was awarded pursuant to Executive Order 12985.