Principal FPGA/ASIC Design Engineer - Secret Clearance

Prattwhitney; El Segundo (CA); Presencial; USD 118.000 - 225.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical insurance

Dental insurance

Vision insurance

Three weeks of vacation for new hires

401(k) plan with employer matching

Descripción de la vacante

RTX in El Segundo, CA seeks a Principal Electrical or Computer Engineer to design, verify, and integrate high‑performance digital ASICs and FPGAs for signal processing and information assurance on the Mission Systems Microelectronics Technology team.

You will lead RTL/verification efforts, develop using VHDL/Verilog, and collaborate across disciplines to meet aggressive schedules; U.S. citizenship and active security clearance are required.

Formación

• Demonstrated experience developing, coding, and simulating RTL designs using VHDL and/or Verilog.
• Experience with digital logic architecture and design, including resource utilization tradeoffs, timing analysis, and timing closure.
• Hands‑on experience developing and maintaining testbenches for RTL verification using VHDL and/or SystemVerilog.
• Proficiency with ASIC and/or FPGA design, simulation, and synthesis tools, such as ModelSim, Synplify, Quartus, Vivado, or equivalent tools.
• Experience using revision control tools and methodologies, such as Git or Subversion, to manage design files and track development changes.
• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience.
• Active and transferable U.S. government issued security clearance is required prior to start date
• U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
• Ability to work with minimal supervision, team with engineers of a variety of skills and backgrounds, and matrix into projects with aggressive schedules and frequent milestones.
• Strong oral and written communication skills with the ability to document and present one's work and status
• Familiarity with best practice chip-level verification techniques and languages (e.g. constrained random, functional coverage, SystemVerilog)
• ASIC / FPGA lab validation with advanced lab equipment
• Design for Test (DFT) and manufacturability issues
• Experience with Unix, scripting, C/C++, and/or Perl

Responsabilidades

• Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification, and system integration
• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA design flow
• Contribute to engineering estimates for new program pursuits
• Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status

Conocimientos

RTL design

VHDL/Verilog

Timing analysis

SystemVerilog

FPGA/ASIC

ModelSim

Git

Lab validation

Educación

STEM degree

Herramientas

ModelSim

Synplify

Quartus

Vivado

Descripción del empleo

RTX in El Segundo, CA seeks a Principal Electrical or Computer Engineer to design, verify, and integrate high‑performance digital ASICs and FPGAs for signal processing and information assurance on the Mission Systems Microelectronics Technology team.

You will lead RTL/verification efforts, develop using VHDL/Verilog, and collaborate across disciplines to meet aggressive schedules; U.S. citizenship and active security clearance are required.