Principal FPGA/ASIC Design Engineer (Remote)

rollsroyce; United States; A distancia; USD 140.000 - 210.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Discretionary bonus plan

Health/Dental/Vision Insurance

401(k) with company match

Descripción de la vacante

Rolls-Royce is seeking a Principal Engineer for FPGA/ASIC design working from home. You will lead the development of safety-critical digital devices, verify complex designs, and drive timing closure across FPGA/ASIC implementations for engine control systems.

The role requires hands-on RTL coding, simulation, lab verification, and collaboration with a global multidisciplinary team. Expect up to 25% travel when needed.

Formación

• Bachelor's degree in Electronics Engineering and/or Computer Engineering with 5+ years of experience
• Master's degree in Electronics Engineering and/or Computer Engineering with 3+ years of experience
• PhD in Electronics Engineering and/or Computer Engineering
• U.S. Citizen is required to be considered for this role

Responsabilidades

• Participate in all project phases to produce detailed design documentation, verification plans and reports
• Design and development of custom digital devices (ASIC/FPGA) for RR electronic engine control units
• Verify complex products using FPGAs/ASICs to DO-254 standards
• Develop RTL using VHDL/Verilog/SystemVerilog and debug via simulations
• Achieve timing closure on FPGA designs and generate test benches
• Evaluate the process flow including high level design, synthesis, place-and-route, timing constraints and power

Conocimientos

FPGA/ASIC design

RTL design

Timing closure

Lab testing

Scripting (TCL, Python)

Educación

Bachelor's degree in Electronics/Computer Engineering

Master's degree in Electronics/Computer Engineering

PhD in Electronics/Computer Engineering

Herramientas

Actel & Xilinx tool flows

Git

MATLAB/Simulink

MagicDraw / Cameo SysML

Descripción del empleo

Rolls-Royce is seeking a Principal Engineer for FPGA/ASIC design working from home. You will lead the development of safety-critical digital devices, verify complex designs, and drive timing closure across FPGA/ASIC implementations for engine control systems.

The role requires hands-on RTL coding, simulation, lab verification, and collaboration with a global multidisciplinary team. Expect up to 25% travel when needed.