Principal Failure Analysis Engineer - SoC Reliability Lead

Ampere Computing LLC; Santa Clara, Northern (CA, KY); Hybrid; USD 155,000 - 232,000; Full time

Benefits offered by this job

Health insurance

401K retirement plan

Unlimited flextime

Paid holidays

Snacks and beverages

Job summary

Ampere Computing LLC in Santa Clara, CA seeks a Principal Failure Analysis (FI/FA) Engineer to define and execute forward‑looking FI/FA strategies, lead fault isolation, and manage PFA activities across wafer sort to RMAs. You will correlate physical defects with electrical signatures and report findings to peers and leadership.

The role requires 8+ years in semiconductor FA, deep CMOS knowledge, and hands-on tools experience (SEM/FIB, TEM).

Qualifications

• Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field.
• 8+ years of direct, hands-on experience in semiconductor failure analysis.
• Deep understanding of CMOS device physics and advanced process technologies (FinFET).
• Proven hands-on expertise with a wide range of fault isolation tools.
• Proficiency in physical analysis techniques including SEM/FIB and TEM, with sample prep.

Responsibilities

• Develop and execute a comprehensive FI/FA strategy aligned to the product roadmap.
• Establish failure triage, isolation, and physical analysis methodologies.
• Lead complex failure investigations from wafer sort to RMAs and customer returns.
• Perform EFI and guide PFA activities including sample prep and imaging.
• Correlate defects to electrical signatures and datalogs to identify root cause.
• Author clear, data-driven FA reports for peers and leadership.
• Manage external FA lab relationships and SOWs to ensure high-quality results.

Skills

Fault isolation

Semiconductor FA

CMOS physics

Analytical thinking

Communication skills

Education

Bachelor's degree in Electrical Engineering

Tools

SEM/FIB

TEM analysis

Python scripting

JSL/Perl scripting

Job description

Ampere Computing LLC in Santa Clara, CA seeks a Principal Failure Analysis (FI/FA) Engineer to define and execute forward‑looking FI/FA strategies, lead fault isolation, and manage PFA activities across wafer sort to RMAs. You will correlate physical defects with electrical signatures and report findings to peers and leadership.

The role requires 8+ years in semiconductor FA, deep CMOS knowledge, and hands-on tools experience (SEM/FIB, TEM).