Principal DSP/FPGA Engineer — Aerospace Innovation

RTX (Raytheon); Cedar Rapids (IA); On-site; USD 120,000 - 190,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Tuition reimbursement

Retirement plan

Life insurance

Job summary

Collins Aerospace seeks a Principal DSP FPGA/ASIC Engineer to join the Applied Research and Technology team in Cedar Rapids, Iowa. You will design, develop and implement signal processing algorithms on FPGA and ASIC platforms, leveraging Simulink modeling and MATLAB.

Collaborate with hardware, software and systems engineers to optimize performance, power and area, mentor junior engineers, and contribute to the team's technical roadmap while staying current with FPGA toolchains and industry

Qualifications

• Degree in STEM with 8+ years experience or an advanced degree with 5+ years.
• Ability to obtain and maintain a DoD secret security clearance.
• Strong modeling with Simulink and MATLAB for DSP systems.
• Proficiency in VHDL/Verilog for FPGA/ASIC design and implementation.

Responsibilities

• Develop and implement DSP algorithms for FPGA/ASIC based systems.
• Model and simulate DSP systems using Simulink/MATLAB.
• Collaborate with hardware, software and systems teams to validate DSP algorithms.
• Optimize FPGA implementations for performance, power and area.
• Perform system-level analysis and testing to meet requirements.
• Provide mentorship to junior engineers and contribute to the technical roadmap.
• Integrate signal processing solutions with larger systems.

Skills

Simulink

MATLAB

VHDL/Verilog

FPGA/ASIC design

Education

STEM degree

Advanced degree preferred

Tools

Vivado

Quartus

HDL Coder

Job description

Collins Aerospace seeks a Principal DSP FPGA/ASIC Engineer to join the Applied Research and Technology team in Cedar Rapids, Iowa. You will design, develop and implement signal processing algorithms on FPGA and ASIC platforms, leveraging Simulink modeling and MATLAB.

Collaborate with hardware, software and systems engineers to optimize performance, power and area, mentor junior engineers, and contribute to the team's technical roadmap while staying current with FPGA toolchains and industry