Principal Digital Mixed-Signal Systems Architect

Renesas; Texas; On-site; USD 180,000 - 240,000; Full time

Job summary

Renesas seeks an experienced Digital Mixed-Signal System Architect to define, model, and validate digitally implemented data paths for next-generation power management products.

You will collaborate with systems, digital design, firmware, verification, validation, applications, and analog teams to translate requirements into executable architecture, emulation-ready models, RTL-facing specs, and silicon-validation evidence.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 8+ years of experience in digital systems architecture, mixed-signal SoC architecture, digital signal processing, power management, control-oriented digital design, semiconductor verification, or related product development.
• Strong understanding of digital signal-processing concepts, fixed-point arithmetic, sampling theory, filtering, timing, latency, quantization, saturation, and numeric precision tradeoffs.
• Experience defining ADC-facing digital logic, sensor data paths, telemetry data paths, digital controllers, or control-loop support logic in a semiconductor product environment.
• Ability to translate system-level requirements into RTL-facing architecture, firmware-visible behavior, emulation models, and validation-ready specifications.
• Strong cross-functional communication skills, including the ability to align systems, digital design, firmware, analog, verification, validation, applications, and software/tool teams.

Responsibilities

• Define digital mixed-signal system architecture for digital multiphase power controllers and related power management products.
• Architect front-end digital signal-processing paths used to filter, condition, scale, decimate, observe, and route sensed voltage and current information into control-loop, telemetry, protection, and diagnostic functions.
• Define ADC interface behavior, ADC controller requirements, sampling relationships, data-valid timing, channel sequencing, calibration hooks, latency budgets, saturation behavior, quantization expectations, and error-handling requirements.
• Develop executable models and emulation-oriented representations that allow system behavior to be explored before RTL and silicon are complete.
• Translate system and control-loop requirements into RTL-facing specifications, fixed-point formats, datapath constraints, register behavior, firmware interfaces, and validation requirements.
• Collaborate with analog design experts on ADC and sensing assumptions while focusing ownership on the digital architecture, control data path, emulation behavior, and system-level integration.
• Work with firmware teams to define observability, debug access, telemetry behavior, configuration flows, and bring-up hooks needed for characterization and customer support.
• Partner with verification and validation teams to define reference scenarios, pass/fail criteria, correlation expectations, coverage targets, and structured evidence for architectural decisions.
• Analyze tradeoffs across loop performance, latency, noise sensitivity, resolution, dynamic range, power, area, configurability, implementation complexity, and customer-visible behavior.
• Document architecture clearly for cross-functional execution teams, including assumptions, interface contracts, model behavior, limits, corner cases, and validation expectations.

Skills

Digital systems architecture

Mixed-signal SoC

Digital signal processing

Power management

Control-oriented design

Semiconductor verification

Cross-functional collaboration

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

SystemVerilog

Python

MATLAB

C/C++

Emulation

FPGA prototyping

Behavioral modeling

Hardware/software co-design

Job description

Renesas seeks an experienced Digital Mixed-Signal System Architect to define, model, and validate digitally implemented data paths for next-generation power management products.

You will collaborate with systems, digital design, firmware, verification, validation, applications, and analog teams to translate requirements into executable architecture, emulation-ready models, RTL-facing specs, and silicon-validation evidence.