Principal DFT Architect – Equity Eligible

Broadcom; San Jose (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grants

401(k) with company matching

Medical, dental and vision plans

Job summary

Broadcom's San Jose, California Development Center is seeking a Principal DFT Engineer to lead DFT programs from chip-level specification through implementation and verification to production release.

The role involves DFT architecture, test insertion, pattern generation, coverage, post-silicon debug and yield improvements, with interaction across global teams. TCL, PERL, Python, C++, or similar languages are used.

Qualifications

• Strong DFT background including IO and Analog DFT, ATPG and related techniques.
• Experience with Scan insertion and compression tools.
• Proficiency in ATPG vector generation, simulation and debugging.
• Proficient in Verilog coding, testbench creation and simulation.
• Memory BIST insertion/verification on embedded memory blocks.
• Boundary scan verification and IEEE 1149.x knowledge.
• Familiarity with DFT/STA concepts and constraints.
• Knowledge of IEE1687, IJTAG, ICL and PDL standards.
• Ability to work in cross-disciplinary teams and strong communication.

Responsibilities

• Lead DFT programs from chip-level spec to implementation and production release.
• Implement DFT features: Scan, MBIST, TAP, LBIST, IO and SerDes integration.
• Collaborate with STA, DI engineers for design closure and timing.
• Generate, verify and debug DFT test vectors prior to tape-out.
• Debug test vectors on ATE during silicon bring-up and yield improvements.
• Engage with customers and global teams, drive innovative DFT solutions.

Skills

DFT

IO DFT

Analog DFT

ATPG

Scan Insertion

MBIST

TAP

LBIST

IO

SerDes

DDR

PCIE

IEEE1149

IEEE1149.6

Verilog

TestBench

C++

Python

Scripting (TCL, PERL, RUBY)

Tcl

Mentor TestKompress

DFT Compiler

TetraMax

Fastscan

Education

Bachelor's in Electrical/Electronic/Computer Engineering

Tools

DFT Compiler

Mentor TestKompress

TetraMax

Fastscan

Verilog

Job description

Broadcom's San Jose, California Development Center is seeking a Principal DFT Engineer to lead DFT programs from chip-level specification through implementation and verification to production release.

The role involves DFT architecture, test insertion, pattern generation, coverage, post-silicon debug and yield improvements, with interaction across global teams. TCL, PERL, Python, C++, or similar languages are used.