Principal Design Verification Engineer — Remote & Flexible

Analog Devices; North Carolina; Hybrid; USD 150,000 - 200,000; Full time

Job summary

Analog Devices, Inc. seeks a Principal Design Verification Engineer to provide strategic leadership for the Power Controller BU portfolio at the Durham, NC site. You will mentor a small team, define DV strategy, and drive advanced UVM/formal/mixed-signal verification across projects.

Collaborating with analog/digital design, product engineering, and silicon validation teams, you will elevate verification quality and delivery through scalable infrastructure and cutting-edge methodologies.

Qualifications

• 10+ years of hands-on SystemVerilog/UVM-based verification.
• 3+ years of technical leadership experience.
• Experience architecting verification environments for complex mixed-signal SoCs or PMICs.
• Proven DV strategy ownership across multiple projects.
• Proficient in Python, TCL, Perl, and Shell for verification automation.
• Experience with formal verification tools (JasperGold/VC Formal).
• Strong coverage-driven verification and debug skills.

Responsibilities

• Define and implement the DV strategy for the group across multiple projects.
• Develop comprehensive DV plans and drive adoption of advanced methodologies.
• Lead and mentor a small verification team; conduct code and methodology reviews.
• Collaborate with analog/digital design teams for seamless integration.
• Drive evaluation and adoption of new EDA tools and Verification IPs.
• Lead development of testbench components including UVM environments and formal verification.
• Support projects with DV planning, execution oversight, and issue resolution.
• Represent the verification team in design reviews and executive briefings.

Skills

SystemVerilog/UVM

Leadership

DV strategy

EDA tools

Python

Formal verification

UVM architectures

Mixed-signal verification

Testbench development

CI/CV pipelines

Education

Bachelor’s or Master’s degree in Electrical or Computer Engineering

Tools

Cadence

Synopsys

Mentor/Siemens

JasperGold

VC Formal

Job description

Analog Devices, Inc. seeks a Principal Design Verification Engineer to provide strategic leadership for the Power Controller BU portfolio at the Durham, NC site. You will mentor a small team, define DV strategy, and drive advanced UVM/formal/mixed-signal verification across projects.

Collaborating with analog/digital design, product engineering, and silicon validation teams, you will elevate verification quality and delivery through scalable infrastructure and cutting-edge methodologies.