Principal Engineer, Design Verification

Analog Devices; North Carolina; Hybrid; USD 150,000 - 200,000; Full time

Job summary

Analog Devices, Inc. seeks a Principal Design Verification Engineer to provide strategic leadership for the Power Controller BU portfolio at the Durham, NC site. You will mentor a small team, define DV strategy, and drive advanced UVM/formal/mixed-signal verification across projects.

Collaborating with analog/digital design, product engineering, and silicon validation teams, you will elevate verification quality and delivery through scalable infrastructure and cutting-edge methodologies.

Qualifications

• 10+ years of hands-on SystemVerilog/UVM-based verification.
• 3+ years of technical leadership experience.
• Experience architecting verification environments for complex mixed-signal SoCs or PMICs.
• Proven DV strategy ownership across multiple projects.
• Proficient in Python, TCL, Perl, and Shell for verification automation.
• Experience with formal verification tools (JasperGold/VC Formal).
• Strong coverage-driven verification and debug skills.

Responsibilities

• Define and implement the DV strategy for the group across multiple projects.
• Develop comprehensive DV plans and drive adoption of advanced methodologies.
• Lead and mentor a small verification team; conduct code and methodology reviews.
• Collaborate with analog/digital design teams for seamless integration.
• Drive evaluation and adoption of new EDA tools and Verification IPs.
• Lead development of testbench components including UVM environments and formal verification.
• Support projects with DV planning, execution oversight, and issue resolution.
• Represent the verification team in design reviews and executive briefings.

Skills

SystemVerilog/UVM

Leadership

DV strategy

EDA tools

Python

Formal verification

UVM architectures

Mixed-signal verification

Testbench development

CI/CV pipelines

Education

Bachelor’s or Master’s degree in Electrical or Computer Engineering

Tools

Cadence

Synopsys

Mentor/Siemens

JasperGold

VC Formal

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital world to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today’s innovators stay Ahead of What’s Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

Principal Engineer, Design Verification

The Data Center and Energy team is seeking a highly experienced Principal Design Verification Engineer to provide strategic leadership and technical direction across our Power Controller BU portfolio at ADI’s Durham, NC facility. As a technical leader, the candidate will lead a small team of verification engineers while driving DV strategy, methodology innovation, and execution excellence across multiple projects. This role combines hands‑on technical expertise with leadership responsibilities, requiring the candidate to define and implement state-of-the-art verification methodologies, mentor team members, and ensure verification quality across the entire product portfolio.

Analog Devices offers a Flexible Work policy which includes remote work days and alternative schedule options.

Key Responsibilities

• Define and implement the DV strategy for the group, ensuring alignment with business objectives and product roadmaps
• Develop comprehensive DV plans for multiple projects as required
• Drive adoption of state-of-the-art DV methodologies including advanced UVM architectures, formal verification, portable stimulus (PSS), and AI/ML-assisted verification techniques
• Establish verification metrics, KPIs, and quality gates to measure verification progress and coverage closure
• Lead and mentor a small team of design verification engineers, providing technical guidance and career development support
• Conduct code reviews, testbench architecture reviews, and methodology assessments
• Collaborate on recruiting, interviewing, and onboarding new verification talent
• Architect scalable, reusable verification infrastructure across multiple projects and product generations
• Drive evaluation and adoption of new EDA tools, verification IP, and emerging methodologies
• Lead development of advanced testbench components including UVM environments, formal verification approaches, and mixed-signal verification solutions
• Support all projects across the portfolio with DV planning, execution oversight, and technical problem-solving
• Partner with analog and digital design teams to ensure seamless integration and verification of mixed-signal designs
• Interface with product engineering, applications, and silicon validation teams
• Represent the verification team in project reviews, design reviews, and executive briefings
• Develop and document best practices, guidelines, and playbooks for the verification organization
• Stay current with industry trends and drive adoption of relevant innovations

Minimum Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Engineering
• 10+ years of hands-on experience in SystemVerilog/UVM-based verification
• 3+ years of technical leadership experience, including mentoring engineers, leading verification efforts on complex projects, or managing small teams
• Demonstrated experience architecting verification environments for complex mixed-signal SoCs or power management ICs
• Proven track record of defining and implementing DV strategies across multiple concurrent projects
• Expert-level proficiency in EDA tools and automation (Python, TCL, Perl, Shell) for building verification infrastructure and flows
• Experience with formal verification methodologies and tools (JasperGold, VC Formal, or equivalent)
• Strong understanding of coverage-driven verification, including functional coverage modeling and closure strategies
• Excellent communication skills with the ability to present technical content to diverse audiences, including executives

Preferred Qualifications

• Experience with portable stimulus standard (PSS) and graph-based verification approaches
• Deep knowledge of analog/mixed-signal verification techniques including SV-RNM modeling
• Experience with verification of ARM/RISC-V based sub-systems or complex SoCs
• Expertise in power management IC verification, including multiphase DC-DC controllers, voltage regulators, and power sequencing
• Experience with voltage interface protocols such as PMBUS, AVS, SVID, SVI3, I2C, SPI
• Knowledge of emulation and FPGA prototyping methodologies for early software enablement
• RTL design experience providing strong design-for-verification perspective
• Experience building and scaling verification teams or capabilities
• Track record of driving process improvements that measurably improved verification quality or efficiency
• AI/ML tools for verification – keen interest and experience leveraging AI for coverage closure, test generation, debug, or productivity improvements
• Proficiency with multiple verification platforms (Cadence, Synopsys, Mentor/Siemens)
• Experience with continuous integration/continuous verification (CI/CV) pipelines
• Familiarity with cloud-based verification and distributed simulation/regression management
• Version control expertise (Git, Perforce) and collaborative development workflows
• Verilog, C/C++, SystemC for modeling and verification
• Strong analytical and debug skills with ability to drive complex issues to resolution

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: Experienced

Required Travel: Yes, 10% of the time

Shift Type: 1st Shift/Days