Principal CPU Prefetch Verification Architect

SiFive, Inc.

Austin (TX)

On-site

USD 200,000 - 260,000

Full time

14 days+
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Benefits offered by this job

Health insurance
Retirement plan
Paid time off

Job summary

SiFive, Inc. seeks a Principal Design Verification Engineer to lead verification strategy and execution for CPU Core Hardware Prefetch in a high-performance out-of-order core.

The role combines technical leadership with hands-on verification across unit- and core-level activities. You will collaborate with architecture, RTL, performance, software, and verification teams to translate architectural intent into test content, drive coverage closure, and mentor engineers to build scalable DV

Qualifications

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 12+ years of CPU/core or SoC functional verification experience, suitable for a Principal / T6 level.
  • Direct experience with out-of-order CPU core verification.
  • Strong debugging, analysis, and software/scripting fundamentals for DV infrastructure.

Responsibilities

  • Lead verification planning and execution for CPU hardware prefetch across unit-level and core-level strategy, debug, coverage closure, and sign-off readiness.
  • Define verification strategy, test plans, checkers, scoreboards, assertions, and coverage models for prefetch microarchitecture and corner cases.
  • Drive verification of prefetch behaviors including stream allocation, training from demands, prefetch generation, request replay and kill behavior, and MSHR interactions.
  • Verify correctness of runtime configurability through prefetch CSRs including enablement, windowing, thresholds, and queue allocation controls with cache/memory hierarchy.
  • Verify interactions between prefetch engine and memory hierarchy: DCache pipeline, training conditions, MSHR fullness, arbitration with core traffic.
  • Develop verification strategies for challenging corner cases such as stream misconfirmation, untraining, queue unavailability, throttling, page-boundary behavior, multi-stream behavior.
  • Use architectural counters, self-checking tests, and microarchitectural observability to validate functional correctness across performance-sensitive traffic.
  • Mentor engineers and shape reusable verification approaches and infrastructure for future CPU cores.

Skills

CPU verification
SoC verification
Hardware prefetch verification
Scripting / automation

Education

BS/MS/PhD in Electrical/Computer Engineering or CS

Job description

SiFive, Inc. seeks a Principal Design Verification Engineer to lead verification strategy and execution for CPU Core Hardware Prefetch in a high-performance out-of-order core.

The role combines technical leadership with hands-on verification across unit- and core-level activities. You will collaborate with architecture, RTL, performance, software, and verification teams to translate architectural intent into test content, drive coverage closure, and mentor engineers to build scalable DV

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