Principal CAD Engineer: Tapeout & Tool Flows MEMS Timing

SiTime Corp.; United States; On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

401k plan

Health and wellness benefits

Parental leave

Legal services

Time off plans

Job summary

SiTime Corp. is seeking a Principal CAD Engineer to lead CAD tool flows across Cadence, Synopsys, Siemens and Keysight platforms. You will own PDK installation, tapeout coordination and regression testing for CMOS design teams across sites.

You will interface with EDA vendors, deploy new tool flows, and optimize design productivity through automation and scripting. Strong Linux and scripting skills are essential.

Qualifications

• 7+ years of experience with analog and digital CMOS IC CAD support using EDA tools.
• Experience with end-to-end tapeout flows and foundry coordination.
• Strong communication and teamwork in a fast-paced environment.

Responsibilities

• Provide full lifecycle support for custom CAD flows across Cadence, Synopsys, Siemens and Keysight platforms.
• Own PDK installation, validation, customization and release management with foundries.
• Support tapeout submissions, schedules and quality standards with foundries.
• Support schematic capture, analog/mixed-signal simulation, layout and DRC workflows.
• Maintain digital simulation, verification environments and P&R tools.
• Develop CAD utilities, automation scripts and regression flows for design efficiency.
• Perform functional evaluation, performance benchmarking and deployment of new tools.
• Provide CAD software & Linux user support for CMOS design engineers and IC layout designers.
• Prepare and maintain user documentation and training materials.
• Diagnose, resolve and regression test reported problems promptly.
• Interface with EDA vendor teams to influence product improvements.
• Support additional CAD-related initiatives and projects as assigned.

Skills

CMOS CAD

Analog & Digital CMOS

Linux scripting

Team collaboration

Problem solving

Education

BA/BS in Electrical Engineering or Computer Science

Tools

Cadence Virtuoso / Spectre

Siemens Analog Fast-Spice / Questa / CALIBRE

Synopsys Design Compiler / VCS / SpyGlass

Innovus / Tempus

DFII SKILL / PERL / MATLAB / Tcl/Tk / C/C++ / Python

Job description

SiTime Corp. is seeking a Principal CAD Engineer to lead CAD tool flows across Cadence, Synopsys, Siemens and Keysight platforms. You will own PDK installation, tapeout coordination and regression testing for CMOS design teams across sites.

You will interface with EDA vendors, deploy new tool flows, and optimize design productivity through automation and scripting. Strong Linux and scripting skills are essential.