Principal AI SoC Architect — Silicon & AI Systems

Ericsson GmbH

Austin, Northern (TX, KY)

Hybrid

USD 190,000 - 260,000

Full time

7 days ago
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Benefits offered by this job

Health benefits
401(k) plan with company match
Paid time off and holidays

Job summary

Ericsson GmbH in Austin, Texas is seeking a Principal AI Hardware Architect to own the most consequential technical contract between AI workloads, software systems, and custom silicon. You will define exactly what workloads need from silicon and prove it before tapeout, guiding architecture decisions and cross‑team alignment.

This is a high‑leverage engineering seat demanding depth in AI systems, fluency with silicon architecture, and leadership across hardware/software co‑design.

Qualifications

  • 12+ years of industry experience across AI, systems, or silicon.
  • Proven experience at the intersection of hardware and intelligent compute systems.
  • Hardware/software co-design leadership across full product cycles.
  • Demonstrated performance modeling expertise — analytical, simulation, or cycle-approximate.
  • Track record of influencing architectural and product decisions across multiple technical organizations.
  • Exceptional written communication and technical specification ability.

Responsibilities

  • Analyze workload-specific testcases and translate them into concrete hardware requirements.
  • Bridge model engineering, AI infrastructure, and silicon architecture teams to ensure hardware investments are architecturally sound.
  • Develop performance models to guide compute investments and memory hierarchy decisions.
  • Profile real workloads on current and future platforms to identify bottlenecks.
  • Translate across teams to align workload, hardware, and software decisions.

Skills

Python
C++
Written communication
Technical specification

Job description

Ericsson GmbH in Austin, Texas is seeking a Principal AI Hardware Architect to own the most consequential technical contract between AI workloads, software systems, and custom silicon. You will define exactly what workloads need from silicon and prove it before tapeout, guiding architecture decisions and cross‑team alignment.

This is a high‑leverage engineering seat demanding depth in AI systems, fluency with silicon architecture, and leadership across hardware/software co‑design.

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