Pre-Silicon Power Architect for AI Accelerators

d-Matrix

Santa Clara (CA)

Hybrid

USD 100,000 - 150,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

d-Matrix is seeking an engineer to handle pre-silicon power estimation and improve design processes at their Santa Clara headquarters. The ideal candidate will hold a Master's degree in Electrical Engineering or related fields and will have a solid understanding of IC design processes. They must be comfortable with programming in TCL and Python, and possess a strong willingness to contribute to a collaborative team. The position is hybrid, requiring onsite presence 3-5 days a week.

Qualifications

  • IC design fundamentals: understanding of flow and familiarity with EDA tool.
  • Comfortable in traversing between RTL, Physical design, and Automation.
  • Experience with data parsing and algorithmic thinking.

Responsibilities

  • Pre-silicon power estimation of design blocks.
  • Build an architectural power estimation tool for AI workloads.
  • Design and implement performance enabling functions.

Skills

Understanding of IC design flow
Comfortable with TCL
Comfortable with Python
Self-motivated
Strong programming skills

Education

Master’s degree in electrical engineering, Computer Engineering, or Computer Science

Tools

EDA tools for power estimation

Job description

d-Matrix is seeking an engineer to handle pre-silicon power estimation and improve design processes at their Santa Clara headquarters. The ideal candidate will hold a Master's degree in Electrical Engineering or related fields and will have a solid understanding of IC design processes. They must be comfortable with programming in TCL and Python, and possess a strong willingness to contribute to a collaborative team. The position is hybrid, requiring onsite presence 3-5 days a week.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

AI Accelerator Power Architect for RTL and PMAX Optimization
AI Accelerator Power Architect for RTL and PMAX Optimization

d-Matrix inc. • Santa Clara (CA)

Hybrid
USD 100,000 - 130,000
Senior Staff Power Performance Architect Accelerator Design
Senior Staff Power Performance Architect Accelerator Design

d-Matrix • Santa Clara (CA)

Hybrid
USD 100,000 - 150,000
Power Performance Architect, Senior Staff - Accelerator Design
Power Performance Architect, Senior Staff - Accelerator Design

d-Matrix inc. • Santa Clara (CA)

Hybrid
USD 100,000 - 130,000
Senior SoC Power Optimization Engineer (AI Accelerator)
Senior SoC Power Optimization Engineer (AI Accelerator)

MatX Inc. • Mountain View (CA)

Hybrid
USD 175,000 - 600,000
PTO 4 weeks
Company Holidays
Remote work weeks
+9
Staff Analog IC Design Engineer for AI Accelerators
Staff Analog IC Design Engineer for AI Accelerators

Entrada Ventures • Santa Clara (CA)

On-site
USD 180,000 - 280,000
SoC Architect
SoC Architect

d-Matrix inc. • Santa Clara (CA)

Hybrid
USD 130,000 - 160,000
Principal Architect, Performance Analysis and Modeling
Principal Architect, Performance Analysis and Modeling

D-Matrix Corp. • Santa Clara (CA), Northern (KY)

Hybrid
USD 150,000 - 230,000
Silicon Architect & RTL Designer - High-Perf Compute
Silicon Architect & RTL Designer - High-Perf Compute

MatX • Mountain View (CA)

Hybrid
USD 160,000 - 600,000
PTO 4 weeks
12 company holidays
Up to 3 weeks remote work
+4
Principal Architect, Performance Analysis and Modeling
Principal Architect, Performance Analysis and Modeling

d-Matrix inc. • Santa Clara (CA)

Hybrid
USD 150,000 - 200,000
Lead AI SoC Architect for Next-Gen Transformer Compute
Lead AI SoC Architect for Next-Gen Transformer Compute

d-Matrix inc. • Santa Clara (CA)

Hybrid
USD 130,000 - 160,000