Power Integrity Engineer — High-Current AI Hardware On-Site

The Consensus

San Jose (CA)

On-site

USD 140,000 - 210,000

Full time

14 days+

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Benefits offered by this job

Medical, dental, and vision coverage
Housing subsidy for office proximity
Relocation support to San Jose
Wellness benefits
Daily lunch and dinner in office
Unlimited compute budget

Job summary

Etched is seeking a Power Integrity (PI) Engineer to own the PI methodology for high-power PCB and system designs, from architecture to release. You will ensure robust power delivery to high-performance ASICs and supporting components across operating conditions.

You will work with CAD/EDA tools and collaborate with power, PCB layout, and ASIC teams to refine PDN architecture early in the product lifecycle, with a strong emphasis on verification and debug of rail issues in a fully in-person San

Qualifications

  • BS or MS in Electrical Engineering.
  • 5+ years hands-on PI experience on high-current, high-performance designs.
  • Proficiency with industry PI EDA tools (Ansys SIwave, Cadence Sigrity PowerDC/PowerSI/OptimizePI, or equivalent).
  • Strong understanding of target impedance, decoupling networks, plane resonance, and mitigation.

Responsibilities

  • Perform pre- and post-layout PDN analysis for high-current ASIC power rails.
  • Execute DC IR-drop and current density simulations and define copper weight, plane shapes, via stitching.
  • Conduct AC impedance analysis from VRM output through package and die.
  • Develop and validate VRM models and analyze transient response.
  • Perform power-plane thermal co-simulation and support thermal-electrical tradeoffs.
  • Drive design rule checks for PI compliance with Cadence/Ansys tools.
  • Collaborate with power design, PCB layout, and ASIC teams to define power delivery architecture.
  • Support bring-up and debug rail-level issues and document root-cause findings.
  • Develop and maintain PDN modeling databases.

Skills

Power Integrity
High-current design
ASIC/CPU/GPU power delivery
VRM fundamentals
Transient response
Load-line concepts
Multi-layer PCB stack-up knowledge

Education

B.S. or M.S. in Electrical Engineering or related discipline

Tools

Ansys SIwave
Cadence Sigrity PowerDC
Cadence PowerSI
Cadence OptimizePI

Job description

Etched is seeking a Power Integrity (PI) Engineer to own the PI methodology for high-power PCB and system designs, from architecture to release. You will ensure robust power delivery to high-performance ASICs and supporting components across operating conditions.

You will work with CAD/EDA tools and collaborate with power, PCB layout, and ASIC teams to refine PDN architecture early in the product lifecycle, with a strong emphasis on verification and debug of rail issues in a fully in-person San

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