Post-Silicon Validation Engineer

Programmers.io; Sunnyvale (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Programmers.io is seeking an Embedded FW/Validation engineer in Sunnyvale, CA to validate display-oriented SOCs and IPs. The role focuses on RTL alignment, FW integration, and debugging across silicon bring-up, emulation, and FPGA platforms using C/C++ and Python.

Responsibilities include defining validation strategies, executing performance characterization, data automation, and cross-functional collaboration with factory test teams to ensure robust production characterization.

Qualifications

• Experience validating display SOCs and IP blocks.
• Ability to define validation strategies and test plans.
• Develop silicon validation infrastructure and scripts for emulation, FPGA, and first silicon platforms.

Responsibilities

• Validate display SOCs, Mixed Signal SOCs, and IPs.
• Define validation strategy and test plans aligning RTL, architecture, and FW.
• Develop silicon validation infrastructure and coding in C/C++ and Python for emulation, FPGA, and first silicon platforms.
• Execute bring-up, debugging, workload enablement, and SW stack validation.
• Perform performance and power characterization.
• Create automated data collection and executive summaries from datasets.
• Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes.
• Collaborate with factory test teams to align validation and production characterization strategies.

Skills

RTL experience

Embedded FW Development

Debugging

ARM SoC

Display/Graphics

Tools

C/C++

Python

Zebu emulation

FPGA (HAPS)

Job description

We need candidates who have RTL experience, Embedded FW Development and debug, ARM SoC, Display/Graphics relatedexperience.

Does not need to have ML-coprocessor background. Display domain is more important.

Job Description:

• Validate display SOC, Mixed Signal SOC, and IP.
• Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW.
• Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and develop mitigation strategies.
• Execute bring-up/debug, workload enablement, and SW stack validation.
• Perform performance and power characterization.
• Create automated data collection flows and convert large datasets into executive summaries.
• Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes.
• Participate in design reviews and provide recommendations to strengthen validation coverage.
• Collaborate with factory test teams to align validation and production characterization strategies.