Physical Design Manager

Quest Global; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Quest Global in Santa Clara, CA is seeking a Physical Design Manager to lead low-power design efforts on advanced nodes (5nm/3nm). The role requires deep experience in physical design, timing closure, and RTL2GDSII tape-outs, with a focus on UPF methodologies and SDC constraints.

You will mentor engineers, drive design closure with cross-functional teams, optimize flows using TCL, Python, and Shell, and contribute to methodology improvements.

Qualifications

• Bachelor's degree in a technical field or equivalent practical experience.
• 10+ years of experience in physical design and cross-functional teamwork.
• Strong knowledge of RTL2GDSII flow and 5nm+ tape-outs.
• Proficient with EDA tools: DC/Genus, Innovus/ICC2, Primetime, Calibre.
• Hands-on experience in floorplanning, place & route, and clock distribution.

Responsibilities

• Deliver low power designs using UPF on 5nm/3nm nodes.
• Resolve SoC/SS integration challenges including SDC constraints.
• Develop and maintain automation flows using Tcl, Python, and Shell.
• Collaborate with cross-functional teams for design closure and signoff.
• Mentor and lead junior team members.
• Innovate and contribute to flow/methodology improvements.

Skills

Physical Design

Timing Closure

SoC Floorplanning

EDA Tools Proficiency

Scripting TCL/Python

Cross-functional Collaboration

Education

Bachelor's degree in CS/CE or equivalent

Tools

DC/Genus

Innovus/ICC2

Primetime

Redhawk/Voltus

Calibre

Job description

Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we are able to solve problems better, faster. This multi-dimensional approach enables us to solve the most critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries.

Role - Physical Design Manager

Location - Santa Clara, CA, USA

Work Experience

What You will Do:

• Deliver low power designs using advanced UPF methodologies on 5nm/3nm nodes.
• Resolve SoC/SS integration challenges including SDC constraints and UPF promotion/pushdown.
• Develop and maintain automation flows using Tcl, Python, and Shell.
• Collaborate with cross-functional teams for design closure and signoff.
• Mentor and lead junior team members.
• Innovate and contribute to flow/methodology improvements.

What You Will Bring:

• Experience in physical design and timing closure.
• Bachelors degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• Knowledge of RTL2GDSII flow and design tape-outs in 5nm or below process technologies.
• Experience with EDA tools like DC/Genus, Innovus/ICC2, Primetime, Redhawk/Voltus, or Calibre.
• Hands-on experience in SoC floor planning, place & route, power and clock distribution, and timing convergence of high-frequency designs.
• Knowledge of geometry/process/device technology implications on physical design.
• 10+ years of experience in interpersonal, teamwork, and demonstrated experience communicating and interfacing with cross-functional teams, IP, and EDA vendors.
• Programming/scripting skills: TCL, Python, Perl or Shell.