Physical Design Engineer Intern

VisLab (an Ambarella Inc. company); Kentucky; Sur place; USD 110 000 - 170 000; Plein temps

Résumé du poste

VisLab (an Ambarella Inc. company) is seeking a Physical Design Engineer to join the design team and carry out physical design implementation and verification for Ambarella’s cutting edge low power AI SoC from Netlist to GDSII.

The engineer will contribute across all phases of the SoC flow. Key duties include floor-planning, auto place and route, static timing analysis, ECO implementation, signal integrity analysis, EM/IR analysis, formal verification, and physical layout verification

Responsabilités

• floor-planning
• auto place and route
• static timing analysis
• eco implementation
• signal integrity analysis
• EM/IR analysis
• formal verification
• physical layout verification (LVS/DRC/DFM) at block and/or full chip level.

Description du poste

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

The Physical Design Engineer will be an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella’s cutting edge low power AI SoC from Netlist to GDSII.

The Physical Design Engineer will be responsible for the following areas throughout all phase of SoC implementation process;

• floor-planning
• auto place and route
• static timing analysis
• eco implementation
• signal integrity analysis
• EM/IR analysis
• formal verification
• physical layout verification (LVS/DRC/DFM) at block and/or full chip level.