Physical Design Engineer - 2202599

ZipRecruiter; Cupertino (CA); On-site; USD 90,000 - 150,000; Full time

Job summary

An innovative firm is seeking talented Physical Design Engineers to contribute to the development of cutting-edge AI chips. In this role, you will collaborate with external design services to implement and verify physical designs, enhancing iteration speed and optimizing design processes. You will be involved in exciting projects that include supervising outsourcing efforts, executing design flows, and collaborating with EDA vendors to integrate the latest features. If you have a passion for creative problem-solving and a strong background in physical design, this is a fantastic opportunity to make a significant impact in a rapidly evolving field.

Qualifications

• 2+ years of experience with physical design and tools.
• Proficient in design methodologies from RTL synthesis to GDSII sign-off.

Responsibilities

• Collaborate with third-party design services for physical designs.
• Drive dashboards to monitor project convergence related to physical design.

Skills

Physical Design

RTL Synthesis

GDSII Sign-off

Back-end Design

Timing Closure

Low Power Design Methodology

Creative Thinking

Problem Solving

Python Programming

Tools

OpenROAD

EDA Tools

Job description

Physical Design Engineer

Building AI chips that are hard-coded for individual model architectures.

We are seeking exceptional PD engineers to join our team. The candidate will be responsible for collaborating with third-party design services to implement and verify physical designs, and will help improve iteration speed on physical design processes.

Representative projects include:

• Supervising the outsourcing of physical design to third-party services
• Understanding the intricacies involved in physical design
• Executing physical design flows to close blocks, supporting ASIC infrastructure, automating physical design flows, and improving CAD infrastructure
• Driving dashboards to monitor project convergence related to physical design
• Optimizing tool flows in collaboration with EDA vendors to incorporate latest features
• Being accountable for block-level closure

Requirements:

• At least 2 years of experience with physical design
• Proficiency with tools, flows, and design methodologies from RTL synthesis to GDSII sign-off
• Experience with back-end design and timing closure on 3nm-7nm processes
• Knowledge of UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis
• Creative thinking and ability to approach problems from first principles

Desired qualifications:

• Familiarity with transformer models and machine learning applications
• Experience with OpenROAD and other automated RTL-to-GDSII flows
• Proficiency in programming with Python or other scripting languages