Packaging Research and Development Engineer

Intel Corporation; Chandler (AZ); On-site; USD 115,000 - 220,000; Full time

Benefits offered by this job

Health insurance

Retirement plan

Paid vacation

Stock bonuses

Job summary

Intel Corporation in Chandler, AZ is seeking a Packaging Research and Development Engineer for the Substrate Packaging Technology Development (SPTD) group. You will drive process and material development to scale advanced substrate packaging tech for die disaggregation and heterogeneous integration, with substantial factory floor interaction and supplier engagement.

You will join a world class facility to learn advanced substrate manufacturing know-how, lead cross-functional teams, and

Qualifications

• Bachelor’s, Master’s, or PhD in a related field with relevant experience as specified.
• Experience in semiconductor manufacturing or technology development.
• Experience with material development and process/tool troubleshooting.
• Strong written and verbal communication and cross‑functional collaboration.

Responsibilities

• Define and establish equipment configurations, process specifications, and integrated process flow for new process technologies
• Plan and conduct comprehensive DOEs to fundamentally characterize process window, and understand process / equipment / materials interactions
• Drive continuous process improvements on process capability/stability, quality/reliability, cost/yield, automation, and productivity
• Lead and participate in cross-functional and cross-organizational teams or work groups that support substrate technology development

Skills

Written communication

Verbal communication

Teamwork

Supplier interaction

Willingness to travel

Education

Bachelor’s degree in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related

Master’s degree in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related

PhD in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related

Tools

DSC

TGA

ICP-MS

FTIR

XPS

TOF-SIMS

SEM

JMP

Python

Job description

Substrate Packaging Technology Development (SPTD) is looking for a Packaging Research and Development Engineer to join the Module Engineering Backend Area specifically to be in charge of process and material development to scale advanced substrate packaging technology to enable further die disaggregation / heterogenous integration.

This position requires most of time spent on the factory floor and/or interacting with equipment/material suppliers.

The candidate will join and become part of a world class first of a kind embedded die packaging facility, learn advanced substrate manufacturing know-how, drive disruptive technology innovations, and be part of creating history in the substrate packaging industry.

Responsibilities

• Define and establish equipment configurations, process specifications, and integrated process flow for new process technologies
• Plan and conduct comprehensive DOEs to fundamentally characterize process window, and understand process / equipment / materials interactions
• Drive continuous process improvements on process capability/stability, quality/reliability, cost/yield, automation, and productivity
• Lead and participate in cross-functional and cross-organizational teams or work groups that support substrate technology development

Ideal Candidate Traits

• Written and verbal communication and teamwork skills
• Interact with equipment and materials suppliers
• Willingness to travel (some travel may be required, less than 5 percent)
• Work with ambiguity and flexibility with respect to job roles and working hours is required

Minimum Qualifications

Candidate must possess at least one for the following:

• Bachelor’s degree in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related and 5+ years of experience
• Master’s degree in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related and 3+ years of experience
• PhD degree in Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Chemistry or related and 1+ years of experience

Experience listed above should be a combination of the following:

• Semiconductor manufacturing experience
• Semiconductor Technology development
• Material Development

Preferred Qualifications

• 1+ years of experience in the following:
  • Engineering troubleshooting and analytical skills on integrated technology issues and experience working with broad team of other process and integration engineers
  • Experience owning process tools with knowledge of SPC PCS RFCs equipment troubleshooting statistical design of experiments and process development
  • Experience working with a variety of organic/inorganic materials and processes as well as characterizations utilizing techniques such as DSC, TGA, D/TMA, Titration, ICPMS, FTIR, XPS, TOFSIMS, EDX, SEM, etc. is highly desirable
  • Experience with statistical data analysis, JMP and JSL, Python, relational database structure and usage, machine learning

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location: US, Arizona, Phoenix

Additional Locations:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $115,110.00-219,550.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.

Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role This role will require an on-site presence.

* Job posting details (such as work model, location or time type) are subject to change.

* ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.