Packaging module development engineer

Intel Corporation; Chandler (AZ); On-site; USD 115,110 - 219,550; Full time

Benefits offered by this job

Competitive pay

Stock bonuses

Health benefits

Retirement plans

Vacation time

Job summary

Intel Corporation is looking for a highly skilled engineer to develop and optimize assembly processes for future technologies. Located in Chandler, Arizona, the role involves ensuring the manufacturability of package designs while collaborating closely with supplier quality teams.

The ideal candidate will possess a Master’s or PhD in Mechanical Engineering or a related field, with at least 3 years of relevant experience. The position offers a robust compensation package including competitive pay and stock bonuses.

Qualifications

• 3+ years of experience in relevant fields or similar experience with a PhD.
• Experience in programming and semiconductor processes.
• Preferred: Familiarity with SPC, DOE, AI, and ML concepts.

Responsibilities

• Develop innovative assembly processes and equipment.
• Optimize manufacturing efficiency and quality.
• Ensure manufacturability and oversee packaging processes.

Skills

Programming (Python, MATLAB)

Semiconductor fabrication processes

Statistical Process Control (SPC)

Design of Experiments (DOE)

Artificial Intelligence

Machine Learning

Education

Master’s degree in Mechanical Engineering or related field

PhD in Mechanical Engineering or related field

Job description

Job Description

• Develops assembly processes and/or equipment and applies novel concepts for innovative solutions to enable Intel's roadmap of future assembly packaging platform technologies.
• Optimizes and improves the efficiency of manufacturing of packages, developing processes to meet quality, reliability, cost, yield, productivity and manufacturability requirements.
• Develops process and equipment specifications applying principles for design of experiments and data analysis, and documents improvements through white papers.
• Develops and maintains equipment to evaluate silicon and package technologies under simulated field use conditions, such as heat, humidity, temperature cycle, and dynamic forces.
• Ensures manufacturability of physical layout of package design and oversees the cycle of manufactured package processes, procedures and flows.
• Establishes material specifications for contract assemblers and raw material vendors and interfaces with supplier quality and procurement teams to ensure material quality and vendor performance requirements are met through strict adherence to process specifications and existing product qualification methods.
• Develops new techniques and acceleration methods, tools, and quality screens to ensure the early identification of potential problems with packaging quality and reliability.
• Sets reliability requirements to meet customer needs and influences design, material selection and process development to meet those needs, based on fundamental understanding of failure mechanisms.
• Leads efforts towards innovating, problem solving, developing, and continuously improving equipment and processes using experimental design and statistical methods.
• Provides consultation concerning packaging problems and improvements in the packaging process, and responds to customer/client requests or events as they occur.
• Delivers standardization in product qualification, manufacturing quality systems, and methods and continuously engages with packaging technology development and partner engineering groups on process/technology maturity for products towards key risk areas in meeting product milestones.

Qualifications

• Minimum:Master’s degree in Mechanical Engineering, Materials Science, Electrical Engineering, Physics/Applied Physics, or a related field with3+years of experience, or a PhD in a related field and a similar experience requirement.
• Experience includes a combination of programming/script (e.g., Python, MATLAB) and semiconductor fabrication processes and technologies.
• Preferred:One or more years of experience in technology development, including familiarity with Statistical Process Control (SPC) and/or Design of Experiments (DOE), artificial intelligence and machine learning concepts, delivery of results for complex, time‑critical technical projects, and prior related work experience within a semiconductor foundry.

Job Details

• Job Type: College Grad Shift: Shift1 (United States of America)
• Primary Location: US, Arizona, Phoenix
• Work Model: On‑site presence required.

Benefits

• Competitive pay, stock bonuses, and benefit programs including health, retirement, and vacation.
• Annual salary range for U.S. positions:$115,110.00–$219,550.00USD.

Equal Employment Opportunity Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.