Onsite SoC Verification Engineer – UVM Expert (PA/CA)

itD Tech; United States; On-site; USD 56,000 - 58,000; Full time

Benefits offered by this job

Medical benefits

401(k) plan

Paid holidays

Life insurance

Career learning programs

Job summary

itD is seeking a Verification Engineer to advance verification for next‑gen SoC designs. The role emphasizes UVM environments, SystemVerilog, and rigorous block- and system-level testing in an onsite setting in Allentown, PA or Carlsbad, CA.

The ideal candidate has 5–12 years of ASIC/SoC verification experience, strong UVM/testbench skills, and C firmware exposure for post-silicon bring-up. Salary varies by location with PA and CA ranges.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field.
• 5–12 years of ASIC or SoC design verification experience.
• Strong experience developing UVM-based testbenches.
• Proficiency with SystemVerilog.
• Experience creating verification plans and verification infrastructure.
• Knowledge of block- and system-level verification methodologies.
• Experience with timing and gate-level simulation.
• Experience debugging complex design and verification issues.
• C programming experience for firmware development supporting post-silicon bring-up.

Responsibilities

• Develop and maintain UVM-based verification environments for ASIC/SoC designs.
• Create and execute block- and system-level verification plans.
• Design verification components, including assertions, agents, traffic generators, and scoreboards.
• Partner with cross-functional engineering teams to define verification strategies and improve design testability.
• Debug and resolve complex design and verification issues throughout the development lifecycle.
• Perform timing and gate-level simulations to validate design functionality.
• Support post-silicon bring-up through C-based firmware development and verification activities.

Skills

UVM-based verification

SystemVerilog

ASIC/SoC verification

C programming

Firmware development

Debugging complex issues

Education

Bachelor’s degree in Electrical Engineering or related field

Master’s degree in Electrical Engineering or related field

Tools

Python scripting

Job description

itD is seeking a Verification Engineer to advance verification for next‑gen SoC designs. The role emphasizes UVM environments, SystemVerilog, and rigorous block- and system-level testing in an onsite setting in Allentown, PA or Carlsbad, CA.

The ideal candidate has 5–12 years of ASIC/SoC verification experience, strong UVM/testbench skills, and C firmware exposure for post-silicon bring-up. Salary varies by location with PA and CA ranges.