Onsite Principal FPGA/ASIC Engineer – Secret Clearance

Collins Aerospace; Fullerton (CA); Presencial; USD 118.000 - 225.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Medical, dental, and vision insurance

Three weeks of vacation

Generous 401(k) with employer matching

Descripción de la vacante

Collins Aerospace is seeking an experienced Principal Electrical/Computer engineer for testbench design and verification of high‑performance ASICs and FPGAs used in signal processing and information assurance.

You will architect verification environments with SystemVerilog/UVM, write test plans, develop RTL testbenches, and lead project verification teams. Strong VHDL/Verilog, EDA tools, and collaboration with cross‑functional engineers are essential.

Formación

• Requires degree in Science, Technology, Engineering or Mathematics (STEM) with 8+ years' experience, or an Advanced Degree with 5+ years.
• Active and transferable U.S. government security clearance is required before start date.
• U.S. citizenship required due to clearance eligibility.
• Experience with RTL verification methodologies and language features.

Responsabilidades

• Verify RTL blocks using SystemVerilog/VHDL testbenches and UVM/UVM-F frameworks.
• Develop test plans, test cases, code coverage, and functional coverage.
• Create verification environments for RTL blocks and manage schedules with teams.
• Suggest improvements to ASIC/FPGA verification flow and tools.
• Provide estimates and technical leadership for verification projects.

Conocimientos

RTL coding in VHDL/Verilog

Testbench development

SystemVerilog/UVM knowledge

C/C++ programming

Unix scripting

ASIC/FPGA verification

Git/Subversion

Educación

STEM degree + 8+ years

Advanced degree + 5+ years

Herramientas

Questasim

Synplify

Quartus

Vivado

Git

Descripción del empleo

Collins Aerospace is seeking an experienced Principal Electrical/Computer engineer for testbench design and verification of high‑performance ASICs and FPGAs used in signal processing and information assurance.

You will architect verification environments with SystemVerilog/UVM, write test plans, develop RTL testbenches, and lead project verification teams. Strong VHDL/Verilog, EDA tools, and collaboration with cross‑functional engineers are essential.