Neuromorphic Silicon Lead - Frontend & Verification

Intel Corporation; Phoenix (AZ); Hybrid; USD 221,000 - 312,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in the United States is seeking an experienced front-end silicon lead to drive the design and verification of neuromorphic chiplets and IP. You will lead a multidisciplinary team, turning AI accelerator concepts into manufacturable silicon, with emphasis on high-speed interfaces and robust SoC integration.

The role requires strong leadership, decades of ASIC experience, and the ability to mentor engineers while delivering tape‑outs.

Qualifications

• MS in Electrical/Computer Engineering, Computer Science, or related field.
• 10+ years hands‑on design in processors, accelerators, SoCs, or ASICs.
• 5+ years RTL design and modern ASIC flows (synthesis, timing closure, CDC/RDC, formal, DFV).
• 3+ years leading silicon design and/or verification teams.

Responsibilities

• Identify hardware innovations with architects and researchers and translate into microarchitectures.
• Lead design implementation and verification through post-silicon validation.
• Partner with physical/custom design engineers to prototype blocks and co-design memories.
• Evaluate and integrate internal/external IP including I/O interfaces.
• Collaborate with software and systems teams for early development and post-silicon bring-up.
• Mentor engineers and strengthen design and verification practices at scale.

Skills

RTL design

SoC/ASIC design

Leadership

High-speed interfaces

Pre-silicon enablement

Asynchronous design

Memory/circuit co-design

Mentoring engineers

Education

MS in Electrical/CS

PhD preferred

Tools

Emulation platforms

FPGA prototyping

Job description

Intel Corporation in the United States is seeking an experienced front-end silicon lead to drive the design and verification of neuromorphic chiplets and IP. You will lead a multidisciplinary team, turning AI accelerator concepts into manufacturable silicon, with emphasis on high-speed interfaces and robust SoC integration.

The role requires strong leadership, decades of ASIC experience, and the ability to mentor engineers while delivering tape‑outs.