Design Automation Engineer, Neuromorphic AI Hardware

Intel

Santa Clara (CA)

Hybrid

USD 122,000 - 232,000

Full time

14 days+

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Job summary

Intel’s Neuromorphic Computing Lab is seeking an experienced design automation engineer to advance Loihi’s asynchronous EDA tool flow and support silicon realization from concept to silicon. The role blends front-end design, physical implementation, verification, and FPGA emulation with a strong software focus.

You will work across RTL, verification and physical design, crafting scalable AI-assisted tool flows and leveraging modern automation to accelerate tape-outs and productivity.

Qualifications

  • 4+ years of experience in developing and deploying production quality tools, flows and methods for silicon design.
  • 4+ years of experience with the entire ASIC tool suite: synthesis, place & route, ATPG, FEV, RV, STA, LVS/DRC.
  • 4+ years of scripting in Perl, TCL, Python, etc.
  • 2+ years of delivering multiple silicon tape-outs.

Responsibilities

  • Enhance and maintain Loihi's asynchronous EDA tool flow with design automation algorithms and regression tests.
  • Support RTL designers and verification by providing automated solutions to achieve product KPIs.
  • Enable early SW development by mapping silicon designs in simulation and emulation.
  • Write scripts to manipulate synthesis and physical design tools for low power/high performance designs.

Skills

Software development experience
Strong software background

Education

Bachelor's degree in Electrical Engineering, Computer Science, or related field
Master's degree in related field

Tools

Scripting languages: Perl
Scripting languages: TCL
Scripting languages: Python
ASIC tool suites (synthesis, PnR, ATPG, FEV, RV, LVS/DRC)
FPGA platforms: HAPS
Emulation frameworks: ZeBu

Job description

Intel’s Neuromorphic Computing Lab is seeking an experienced design automation engineer to advance Loihi’s asynchronous EDA tool flow and support silicon realization from concept to silicon. The role blends front-end design, physical implementation, verification, and FPGA emulation with a strong software focus.

You will work across RTL, verification and physical design, crafting scalable AI-assisted tool flows and leveraging modern automation to accelerate tape-outs and productivity.

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