Neuromorphic Silicon Design Automation Engineer

Intel; Hillsboro (OR); Hybrid; USD 122,000 - 232,000; Full time

Job summary

Intel is seeking a design automation engineer to advance Loihi's silicon design flow, spanning front-end design, physical implementation, verification, and FPGA-based emulation. You will work with asynchronous design methods and modern AI-driven tool flows, collaborating across RTL, verification, and physical teams in a hybrid-work setting.

The role demands a strong software background, willingness to learn new technologies, and experience with large-scale FPGA platforms or emulation frameworks.

Qualifications

• Bachelors with 4+ years in silicon tool development; or Masters with 2+ years of relevant experience.
• 4+ years maintaining the ASIC tool suite (synthesis, P&R, ATPG, LVS/DRC).
• 4+ years scripting in Perl, TCL, Python, etc.
• 2+ years delivering multiple silicon tape-outs.

Responsibilities

• Enhance/maintain Loihi's asynchronous EDA tool flow with algorithms, tools, utilities, and regression tests.
• Support RTL designers, verification, and physical design with automated solutions to meet KPIs.
• Enable early SW development by mapping silicon designs in simulation and emulation.
• Write custom scripts to manipulate synthesis/physical design tools for low power/high performance designs.

Skills

ASIC tooling

Python scripting

SystemVerilog

FPGA emulation

Tape-outs

Education

Bachelor's degree in EE/CS

Master's degree (optional)

Tools

HAPS

ZeBu

EDA tools

Job description

Intel is seeking a design automation engineer to advance Loihi's silicon design flow, spanning front-end design, physical implementation, verification, and FPGA-based emulation. You will work with asynchronous design methods and modern AI-driven tool flows, collaborating across RTL, verification, and physical teams in a hybrid-work setting.

The role demands a strong software background, willingness to learn new technologies, and experience with large-scale FPGA platforms or emulation frameworks.