Neuromorphic Front-End Lead

Jobtailor; Arizona; On-site; USD 180,000 - 320,000; Full time

Job summary

Jobtailor is seeking a senior hardware architect to lead silicon design and verification for AI accelerators and custom ASICs. You will collaborate with architects, researchers, and cross-functional teams to translate innovative ideas into robust, manufacturable silicon.

The role demands a track record of tape-outs and leadership in fast-paced environments. Ideal candidates hold a PhD or extensive industry experience in hardware acceleration, advanced packaging, and secure boot concepts.

Qualifications

• MS in Electrical/Computer Engineering or related field.
• 10+ years of hands-on design experience in processors, accelerators, SoCs, or custom ASICs.
• 5+ years of RTL design (Verilog/SystemVerilog) and modern ASIC flows.
• 3+ years leading silicon design and/or verification teams.
• Extended Background Investigation and checks.
• PhD with hardware acceleration research (Preferred).
• Experience with packaging technologies like chiplets, UCIe, 2.5D/3D (Preferred).
• Experience with asynchronous design and pre-silicon enablement (Preferred).
• Experience with UPF low-power design and security features (Preferred).
• History of technical ownership on multiple tape-outs (Preferred).

Responsibilities

• Engage with architects and AI researchers to identify hardware innovations and translate them into implementable microarchitectures.
• Lead design implementation and verification through post-silicon validation.
• Partner with physical/custom design engineers and prototype blocks through place-and-route before hand-off.
• Co-design custom circuits, such as memories, to achieve best KPIs.
• Evaluate, select, and integrate internal and external IP, including I/O interfaces.
• Work with software and systems teams to enable development before tape-out and post-silicon bring-up.
• Mentor engineers and strengthen design and verification practices as the program scales.
• Turn emerging neuromorphic and AI accelerator concepts into manufacturable silicon.

Skills

RTL Design (Verilog/SystemVerilog)

Silicon Design Leadership

Custom ASIC Development

Post-Silicon Validation

Hardware Acceleration

Processor Design

Education

MS in Electrical/Computer Engineering

PhD in Hardware Acceleration (Preferred)

Tools

FPGA Prototyping

Emulation

Advanced Packaging

Heterogeneous Integration

Chiplets

UCIe

2.5D/3D Integration

Job description

Responsibilities

• Engage with architects and AI researchers to identify hardware innovations and optimizations and translate them into implementable microarchitectures
• Lead design implementation and verification through post-silicon validation
• Partner with physical/custom design engineers and prototype blocks through place-and-route before hand-off
• Co-design critical custom circuits, such as memories, to achieve the best KPIs
• Evaluate, select, and integrate internal and external IP, including I/O interfaces
• Work with software and systems teams to enable development before tape-out and ensure smooth post-silicon bring-up
• Mentor engineers and strengthen design and verification practices as the program scales
• Turn emerging neuromorphic and AI accelerator concepts into robust, manufacturable silicon

Requirements

• MS in Electrical/Computer Engineering, Computer Science, or a related field
• 10+ years of hands-on design experience in processors, accelerators, SoCs, or custom ASICs
• 5+ years of experience with RTL design (Verilog/SystemVerilog) and modern ASIC flows (synthesis, timing closure, CDC/RDC, formal, DFV)
• 3+ years leading silicon design and/or verification teams
• Extended Background Investigation, including extended education, SEC sanctions, and additional criminal and civil checks
• PhD with a research background in hardware acceleration, especially AI (preferred)
• Experience with advanced packaging and heterogeneous integration technologies, such as chiplets, UCIe, and 2.5D/3D (preferred)
• Experience with asynchronous design methods and custom memory/circuit co-design (preferred)
• Experience with pre-silicon enablement via emulation or FPGA prototyping (preferred)
• Experience with low-power (UPF) methods and security features such as Root of Trust and secure boot (preferred)
• History of technical ownership on multiple product tape-outs (preferred)

Core Competencies

Demonstrates expertise in hardware design and verification, with a strong focus on processors, accelerators, and custom ASICs. Proven ability to lead teams in silicon design, mentor engineers, and integrate advanced technologies for optimal performance.

Highest-signal resume keywords

• RTL Design (Verilog/SystemVerilog)
• Silicon Design Leadership
• Custom ASIC Development
• Post-Silicon Validation
• Hardware Acceleration

ATS Optimization Keywords

Hard Skills

• Processor Design
• Accelerator Design
• SoC Design
• Custom ASIC Design
• Synthesis
• Timing Closure
• CDC/RDC
• Formal Verification
• DFV
• Low-Power Design (UPF)

Soft Skills

• Mentoring
• Collaboration
• Leadership

Certifications & Qualifications

• MS in Electrical/Computer Engineering
• PhD in Hardware Acceleration (Preferred)

Industry Keywords

• Microarchitecture
• Custom Circuits
• I/O Interfaces
• Post-Silicon Bring-Up
• Root of Trust
• Secure Boot

Tools & Technologies

• FPGA Prototyping
• Emulation
• Advanced Packaging
• Heterogeneous Integration
• Chiplets
• UCIe
• 2.5D/3D Integration