Neural AFE Bench & Validation Engineer

Synchron; San Diego (CA); On-site; USD 100,000 - 135,000; Full time

Benefits offered by this job

Stock options

RSU grants

Job summary

Synchron is developing a high-channel-count neural recording ASIC in partnership with an external IC design house. This role owns independent, in-house validation of the fabricated chip's analog front end: building the bench setup, bringing up first silicon, and characterizing it against spec using our own equipment and protocols — not the partner's self-reported data.

It's a hands-on, mentored position for someone with strong analog front-end fundamentals from school or research who wants bench

Qualifications

• Education: BS/MS/PhD in Electrical Engineering, Bioengineering, or related field with analog front-end expertise.
• No professional experience required; strong fundamentals from coursework, thesis, or internship.
• Hands-on bench skills and familiarity with measurement equipment.
• Proficiency in Python or MATLAB for data analysis and automation.

Responsibilities

• Bench test setup: build and maintain fixtures and instrumentation for first silicon.
• Test plans & protocols: co-develop bench test plans with the ASIC Design & Verification Engineer.
• Independent characterization: measure analog front end against spec per channel and across the array.
• System integration testing: support integration testing of the ASIC with electrode array and lead.
• Documentation: produce characterization and test reports for verification records.
• Growth: evolve into primary owner of the AFE characterization test suite as the program scales.

Skills

Python

MATLAB

Bench testing

Noise measurement

Analog front-end fundamentals

Education

BS/MS/PhD in Electrical Engineering or Bioengineering

Tools

Oscilloscopes

Source-measure units

Signal generators

Data analysis automation

Job description

Synchron is developing a high-channel-count neural recording ASIC in partnership with an external IC design house. This role owns independent, in-house validation of the fabricated chip's analog front end: building the bench setup, bringing up first silicon, and characterizing it against spec using our own equipment and protocols — not the partner's self-reported data.

It's a hands-on, mentored position for someone with strong analog front-end fundamentals from school or research who wants bench