AFE Test & Integration Engineer

Synchron; San Diego (CA); On-site; USD 100,000 - 135,000; Full time

Benefits offered by this job

Stock options

RSU grants

Job summary

Synchron is developing a high-channel-count neural recording ASIC in partnership with an external IC design house. This role owns independent, in-house validation of the fabricated chip's analog front end: building the bench setup, bringing up first silicon, and characterizing it against spec using our own equipment and protocols — not the partner's self-reported data.

It's a hands-on, mentored position for someone with strong analog front-end fundamentals from school or research who wants bench

Qualifications

• Education: BS/MS/PhD in Electrical Engineering, Bioengineering, or related field with analog front-end expertise.
• No professional experience required; strong fundamentals from coursework, thesis, or internship.
• Hands-on bench skills and familiarity with measurement equipment.
• Proficiency in Python or MATLAB for data analysis and automation.

Responsibilities

• Bench test setup: build and maintain fixtures and instrumentation for first silicon.
• Test plans & protocols: co-develop bench test plans with the ASIC Design & Verification Engineer.
• Independent characterization: measure analog front end against spec per channel and across the array.
• System integration testing: support integration testing of the ASIC with electrode array and lead.
• Documentation: produce characterization and test reports for verification records.
• Growth: evolve into primary owner of the AFE characterization test suite as the program scales.

Skills

Python

MATLAB

Bench testing

Noise measurement

Analog front-end fundamentals

Education

BS/MS/PhD in Electrical Engineering or Bioengineering

Tools

Oscilloscopes

Source-measure units

Signal generators

Data analysis automation

Job description

If you are unable to complete this application due to a disability, contact this employer to ask for an accommodation or an alternative application process.

AFE Test & Integration Engineer

Full Time San Diego, CA, US

Salary Range: $100,000.00 To $135,000.00 Annually

Synchron is developing a high-channel-count neural recording ASIC in partnership with an external IC design house which owns design, simulation, test development, and fabrication. This role owns independent, in-house validation of the fabricated chip's analog front end: building the bench setup, bringing up first silicon, and characterizing it against spec using our own equipment and protocols — not the partner's self-reported data. It's a strong first industrial role for someone with real analog front-end fundamentals from school or research who wants hands-on bench and systems experience on an implantable neural interface program, mentored day-to-day by our senior ASIC design lead.

Key Responsibilities

• Bench test setup:build and maintain the fixtures and instrumentation used to bring up and characterize first silicon.
• Test plans & protocols:co-develop bench test plans and sample-size rationale with the ASIC Design & Verification Engineer, written to the same rigor our design verification work already follows.
• Independent characterization:measure the fabricated ASIC's analog front end against spec — noise floor, CMRR, power consumption, channel-to-channel crosstalk, input-referred noise — per channel and across the array.
• System integration testing:support integration testing of the ASIC into the full signal chain alongside the electrode array and lead.
• Documentation:produce characterization and integration test reports suitable to feed directly into our verification and design history file records.
• Growth:grow into the primary owner of the AFE characterization test suite as the program scales from first silicon through qualification.

Required Skills and Qualifications

• Education: BS, MS, or PhD in Electrical Engineering, Bioengineering, or a related field, with academic, thesis, or research experience in analog front-end / biopotential amplifier design — e.g., chopper-stabilized or low-noise instrumentation amplifiers, or ADC architectures such as SAR or delta-sigma converters.
• Experience: No professional experience required — strong fundamentals from coursework, thesis, or internship work are what matter most for this role. We will teach the medical-device and program-specific context.
• Technical Skills:
  • Familiarity with electrode-tissue interface concepts (electrode-electrolyte impedance, EIS, Randles-cell-style modeling) from coursework or lab work.
  • Hands-on bench skills: oscilloscopes, source-measure units, signal generators, and basic noise-measurement technique.
  • Comfort with Python or MATLAB for data analysis and automating bench measurements.

Base salary between $100,000 and $135,000 per year and stock option or restricted stock units grants.