MTS Silicon Design Engineer

Anysilicon

Santa Clara (CA)

Hybrid

USD 180,000 - 240,000

Full time

12 hours ago
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Job summary

Advanced Micro Devices, Inc. seeks an experienced verification lead in Santa Clara to drive IP/SoC verification for networking solutions.

You will define strategies, build scalable UVM environments, and guide cross-functional teams in high-speed Ethernet, PCIe, and DMA verification. We expect expert SystemVerilog/UVM skills, strong debugging ability, and a track record of delivering signed-off verification for complex IP.

Qualifications

  • Bachelor’s degree in Electrical/Computer Engineering or related field; Master’s preferred.
  • Expert-level SystemVerilog and UVM knowledge.
  • Hands-on experience with SystemVerilog simulators and waveform debuggers.
  • Experience verifying complex IP/subsystems with test plans and coverage.
  • Strong debug skills across architecture, RTL and testbench layers.

Responsibilities

  • Lead verification of complex networking IP, subsystems, and SoCs.
  • Define verification strategy and scalable environments for high-speed Ethernet, PCIe, DMA, etc.
  • Drive functional and performance verification to signoff on next-gen networking products.
  • Develop robust UVM-based testbench architectures for IP, subsystem, and SoC-level verification.
  • Create test plans, feature mappings, and coverage strategies for networking/IP.
  • Verify networking functions including packet processing, switch fabrics, and traffic management.
  • Own execution of verification plans and debug architectural, functional, and performance issues.
  • Collaborate with cross-functional teams and participate in design reviews.
  • Mentor junior engineers and provide technical leadership within the verification team.

Skills

SystemVerilog
UVM
Python scripting
Ethernet/PCIe knowledge
Debugging

Education

Bachelor’s Degree in Electrical/Computer Engineering or related field
Master’s degree preferred

Tools

SystemVerilog simulators
Waveform debuggers

Job description

Advanced Micro Devices, Inc, 2485 Augustine Drive, Santa Clara, CA 95054

Job Description:

At AMD, we harness technology to tackle the world's most pressing challenges, from healthcare advancements to AI innovations. Join us to contribute to groundbreaking projects that shape the future and advance your career.

Responsibilities:

  • Lead verification of complex networking IP, subsystems, and SoCs within AMD’s Network Technologies Solutions Group.
  • Define verification strategy and develop scalable environments for high-speed Ethernet, PCIe, DMA, and more.
  • Drive functional and performance verification to signoff on next-generation networking products.
  • Develop robust UVM-based testbench architectures for IP, subsystem, and SoC-level verification.
  • Create test plans, feature mappings, and coverage strategies for complex networking and data-path IP.
  • Verify networking functions including packet processing, switch fabrics, and traffic management.
  • Own execution of verification plans and debug architectural, functional, and performance issues.
  • Collaborate with cross-functional teams to ensure high-quality deliverables and participate in design reviews.
  • Mentor junior engineers and provide technical leadership within the verification team.

Qualifications:

  • Bachelor’s Degree in Electrical/Computer Engineering or related field; Master’s preferred.
  • Expert-level knowledge of SystemVerilog and UVM.
  • Strong hands-on experience with SystemVerilog simulators and waveform debuggers.
  • Proven experience in verifying complex IP/subsystems with test plans and coverage methodologies.
  • Strong debug skills across architecture, RTL, and testbench layers.

Skills:

  • Scripting skills in Python, Perl, Shell, Tcl, or equivalent for automation.
  • Experience with industry protocols such as PCIe, AXI, Ethernet, and DMA engines.
  • Strong analytical and problem-solving abilities.
  • Excellent verbal and written communication skills.
  • Ability to lead verification tasks independently and drive cross-team closure.

Tell us what you're building and we'll recommend qualified vendors for your project.

  • ASIC Design Services
  • Verification
  • Packaging & Wafer
  • Semiconductor IP
Find the Right Semiconductor Partner

Tell us what you're building and we'll recommend qualified vendors for your project.

  • ASIC Design Services
  • Verification
  • Packaging & Wafer
  • Semiconductor IP

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