Mixed-Signal Verification Engineer — RF/Analog Focus

Apple Inc.; Austin (TX); On-site; USD 139,000 - 257,000; Full time

Job summary

Apple Inc. is seeking a Mixed-Signal Verification Engineer to join the wireless silicon development team in Austin, TX.

You will verify RF/Mixed-Signal blocks and SOCs using SystemVerilog, build testbenches, checkers and tests, and execute verification plans to meet project schedules and coverage metrics. The role requires a BS with 3+ years' experience in RF/mixed-signal verification and expertise with UVM/OVM/VMM, SystemVerilog, and analog behavioral modeling.

Qualifications

• BS degree and 3+ years in RF/Mixed-Signal verification.
• Experience with SystemVerilog testbenches, checkers, and tests.
• Experience with UVM/OVM/VMM HVL methodologies.
• Experience with analog/digital verification of SOCs.

Responsibilities

• Review specifications, extract features, define and execute verification plan.
• Develop top/mixed-signal and digital testbenches in a UVM framework.
• Build and reuse real-numbered analog behavioral models, monitors, and checkers for RF/Mixed-Signal blocks.
• Debug failures, fix testbench issues, manage bug tracking, and analyze coverage.
• Write scripts to automate the verification flow.
• Improve Mixed-Signal verification methodology.

Skills

SystemVerilog testbenches

RF/Mixed-Signal verification

UVM/OVM/VMM HVL

HDL SystemVerilog/Verilog

Verilog-AMS analog models

Analog behavioral modeling

Python/Matlab for signals

Testbench debugging

Communication

Education

BS in Electrical Engineering

Tools

Virtuoso Composer ADE

HED

Job description

Apple Inc. is seeking a Mixed-Signal Verification Engineer to join the wireless silicon development team in Austin, TX.

You will verify RF/Mixed-Signal blocks and SOCs using SystemVerilog, build testbenches, checkers and tests, and execute verification plans to meet project schedules and coverage metrics. The role requires a BS with 3+ years' experience in RF/mixed-signal verification and expertise with UVM/OVM/VMM, SystemVerilog, and analog behavioral modeling.