Mixed-Signal Engineer Intern - Edge AI Vision & Analog IP

Ambarella; Kentucky; On-site; USD 70,000 - 100,000; Full time

Job summary

Ambarella is seeking a qualified candidate to join the Mixed Signal team, contributing to the design, validation and characterization of analog IP blocks for SOCs used in AI vision processors for edge applications. You will collaborate with senior designers and gain exposure to PLL, DLL, SERDES, high-speed IO, and data converters in sub-14nm processes.

Candidates with MS or Ph.D. in EE and strong communication skills are preferred; summer interns may be considered for meaningful hands-on

Qualifications

• Strong fundamentals in analog IC design.
• Good knowledge of digital logic design and Verilog coding.
• Excellent communication skills.
• Lab skills are a plus.
• Knowledge on signal integrity is a plus.
• MS or Ph.D. in electrical engineering.
• Summer interns will also be considered.

Responsibilities

• Collaborate with senior circuit designers on design, validation and characterization of mixed-signal and analog IP blocks for SOC.
• Work on IP blocks such as PLL, DLL, SERDES, high-speed IO and data converters in sub-14nm technologies.

Skills

Analog IC design

Digital logic design

Verilog coding

Signal integrity

Communication skills

Lab skills

Education

MS or Ph.D. in electrical engineering

Tools

Verilog

Job description

Ambarella is seeking a qualified candidate to join the Mixed Signal team, contributing to the design, validation and characterization of analog IP blocks for SOCs used in AI vision processors for edge applications. You will collaborate with senior designers and gain exposure to PLL, DLL, SERDES, high-speed IO, and data converters in sub-14nm processes.

Candidates with MS or Ph.D. in EE and strong communication skills are preferred; summer interns may be considered for meaningful hands-on