Mixed Signal Engineer Intern — SOC IP Design

Ambarella; Washington (District of Columbia); Sur place; USD 120 000 - 180 000; Plein temps

Résumé du poste

Ambarella is seeking a talented engineer to join the Mixed Signal team and contribute to the design, validation and characterization of mixed-signal and analog IP blocks for SOC, including PLLs, DLLs, SERDES, high-speed IO and data converters for sub-14nm technologies.

You will work with senior circuit designers and gain exposure to a broad range of circuit tech, supporting Ambarella's AI vision processors for edge applications in autonomous vehicles, intelligent video surveillance and drones.

Qualifications

• MS or PhD in electrical engineering.
• Experience with analog and mixed-signal circuits.
• Familiarity with Verilog for digital design.
• Strong communication skills and teamwork.

Responsabilités

• Design, validate and characterize mixed-signal and analog IP blocks for SOC.
• Collaborate with senior circuit designers and other teams.

Connaissances

Analog IC design

Digital logic design

Verilog coding

Communication skills

Lab skills

Signal integrity

Formation

MS or Ph.D. in electrical engineering

Description du poste

Ambarella is seeking a talented engineer to join the Mixed Signal team and contribute to the design, validation and characterization of mixed-signal and analog IP blocks for SOC, including PLLs, DLLs, SERDES, high-speed IO and data converters for sub-14nm technologies.

You will work with senior circuit designers and gain exposure to a broad range of circuit tech, supporting Ambarella's AI vision processors for edge applications in autonomous vehicles, intelligent video surveillance and drones.