Mixed Signal Design Verification (MSDV) Engineer

Nexperia; Dallas, Northern (TX, KY); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Health, dental, and vision insurance

Retirement plan with company match

Paid time off and holidays

Job summary

Nexperia's Integrated Circuit Solutions (ICS) Group seeks a highly motivated Mixed Signal Design Verification Engineer to validate analog and mixed-signal IC designs before tapeout. You will lead pre-Si verification, develop environments, and collaborate with design and systems teams to ensure silicon meets specs and is manufacturable.

The role requires strong Verilog/SystemVerilog/UVM experience, Cadence Virtuoso proficiency, scripting, and excellent communication.

Qualifications

• Strong verification background in analog and mixed-signal ICs.
• Experience with Verilog-AMS/SystemVerilog and UVM for automated regressions.
• Familiarity with Cadence Virtuoso and EDA tool flow.
• Excellent communication and leadership abilities.

Responsibilities

• Lead DV to drive pre-tapeout verification and quality tapeouts.
• Develop a detailed pre-Si verification plan and environments; implement regressions.
• Create mixed-signal behavioral models and drive coverage goals.
• Interface across systems, design, test, and silicon validation to ensure complete verification.
• Analyze simulations, identify root causes, and propose actionable fixes.
• Support post-silicon validation and silicon-to-measured performance correlation.

Skills

Verilog/SystemVerilog

UVM

Analog design

Mixed-signal design

Education

Bachelor’s, Master’s or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Unix shell

TCL

Python

Perl

SKILL scripting

Job description

## Mixed Signal Design Verification (MSDV) EngineerApplylocations: Dallastime type: Full timeposted on: Posted Yesterdayjob requisition id: R-20014867**Mixed Signal Design Verification Engineer****Position Summary**Integrated Circuit Solutions (ICS) Group is seeking a highly motivated **Mixed Signal Design Verification Engineer** with a strong background in analog and mixed-signal IC design verification. In this role, you will be responsible for pre-tapeout verification of silicon design, ensuring the part will meet all stated specifications and behavior and is manufacturable and testable. Familiarity with power converters and the challenges of power design is a plus. This position requires strong communication skills and leadership qualities. The selected individual will assume a technical contributor role with the ability to identify and implement opportunities for continuous improvement and work collaboratively with a diverse team of analog and digital designers, layout engineers, and system architects to ensure first-pass silicon success and high-quality product delivery.**Key Responsibilities*** Operate as DV lead to drive quality product tapeouts* Develop a detailed pre-Si verification plan, create simulation environments, and mixed-signal behavioral models and work closely with design and systems teams to execute automated regressions to ensure coverage goals are met* Interface across different functional groups such as systems, applications, test, silicon validation, etc. to ensure product design was verified correctly and completely and that end-product fits customer’s needs* Build relationships with internal teams by closely interacting with them to identify and solve design related problems* Analyze simulation results, identify root causes of failures, and provide actionable recommendations.* Participate in design reviews, verification reviews, and silicon bring-up activities.* Support post-silicon validation and correlation between simulation and measured silicon performance.**Required Qualifications*** Strong familiarity with EDA design tools such as Cadance Virtuoso design environment* Strong familiarity with analog, digital and mixed-signal design and tool flow* Extensive experience with Verilog/Verilog-A/SystemVerilog and Universal Verification Methodology (UVM) to run automated regressions* Working knowledge of Unix shell, TCL, Perl, Python and SKILL scripting languages* Excellent analytical, troubleshooting, and communication skills.* Bachelor’s, Master’s or PhD degrees in Electrical Engineering or related field of study**Preferred Qualifications*** Experience developing verification environment for integrated circuits that incorporate I2C, PMBus or SPI type communication protocols* Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)* Experience with lab validation is a plus* Understand ESD, reliability, and electro-migration verification* Experience with semiconductor manufacturing processes and design-for-test methodologies.* Familiarity with version control systems such as DesignSync, SVN, Git.**Success Factors**The ideal candidate is detail-oriented, analytical, and collaborative, with a passion for delivering robust analog and mixed-signal designs. They thrive in a fast-paced development environment, communicate effectively across cross-functional teams, and are committed to continuous improvement of verification methodologies.**Benefits*** Competitive salary and performance-based incentives* Comprehensive health, dental, and vision insurance* Retirement savings plan with company match* Paid time off and company holidays* Professional development and training opportunities* Collaborative and innovative engineering environment* Opportunities to work on cutting-edge semiconductor technologies**About the team**Join a global team at the forefront of innovation and play a key role in shaping the future of Nexperia’s product offerings.Nexperia is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, color, creed, religion, national origin, ancestry, citizenship status, age, sex or gender (including pregnancy, childbirth and pregnancy-related conditions), gender identity or expression (including transgender status), sexual orientation, marital status, military service and veteran status, physical or mental disability, genetic information, or any other characteristic protected by applicable federal, state or local laws and ordinances. Nexperia’s management team is dedicated to this policy with respect to recruitment, hiring, placement, promotion, transfer, training, compensation, benefits, TeamNexperian’s activities, access to facilities and programs and general treatment during employment.**More information?**For more details please contact: [e-mail]