Mixed-Signal Design Verification Engineer

Broadcom; San Jose (CA); On-site; USD 141,000 - 225,000; Full time

Job summary

Broadcom is seeking a senior-level Mixed Signal Design Verification engineer to work on ASICs for data center connectivity applications. The ideal candidate will have extensive experience in mixed signal design verification, strong communication skills, and proficiency in industry-standard EDA tools. This role offers a competitive salary and comprehensive benefits.

Benefits

Comprehensive medical, dental, vision benefits

401(k) plan

Employee Stock Purchase Plan (ESPP)

Paid holidays and sick leave

Vacation

Qualifications

• 10+ years of experience in mixed signal design verification.
• Hands-on experience with SV UVM, SV RNM, and verification coverage matrix.
• Self-motivated team player.

Responsibilities

• Work on ASICs for data center connectivity applications.
• Develop checkers, write assertions, and create metric-driven verification plans.
• Set up and maintain regressions using Verisium Manager.

Skills

Mixed signal design verification

SV UVM

SV RNM

Verification coverage matrix

Regression tests

Analog mixed-signal building blocks

Randomized vectors generation

EDA tools

Scripting languages (PERL, Python)

Education

MS or PhD in Electrical or Computer Engineering

Tools

Synopsys

Cadence

Verisium Manager

Job description

Job Description:

Broadcom is seeking a senior-level Mixed Signal Design Verification engineer. In this highly visible role, you will work on ASICs for data center connectivity applications.

Qualifications include:

• MS or PhD in Electrical or Computer Engineering with 10+ years of experience in mixed signal design verification.
• Hands-on experience with SV UVM, SV RNM, and verification coverage matrix.
• Familiarity with writing regression tests, developing checkers, writing assertions, and developing metric-driven verification plans.
• Experience in setting up and maintaining regressions using Verisium Manager.
• Knowledge of analog mixed-signal building blocks such as ADCs, DACs, PLLs, and SerDes.
• Experience in generating randomized vectors for analog and digital behavioral model verification.
• Proficiency with industry-standard EDA tools like Synopsys and Cadence.
• Experience with GLS, with and without parasitic annotated simulations.
• Experience in generating UVM RAL models.
• Proficiency with scripting languages such as PERL and Python.
• Self-motivated team player.

Highly Desired Qualifications:

• Strong communication skills for technical and management levels.
• Proactive, collaborative, and innovative approach.
• Excellent time management and interpersonal skills.

Additional Job Details:

Compensation and Benefits: The annual base salary ranges from $141,000 to $225,000. The position is eligible for a discretionary annual bonus and equity awards, in accordance with company plans. Broadcom offers comprehensive benefits including medical, dental, vision, 401(k), ESPP, EAP, paid holidays, sick leave, vacation, and adherence to applicable leave laws.

Equal Opportunity Employer: Broadcom is committed to diversity and inclusion. We consider all qualified applicants regardless of race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability, medical condition, pregnancy, veteran status, or other protected characteristics. We also consider applicants with arrest and conviction records as per local laws.

Note for International Applicants: If you are outside the USA, please provide a home address for future correspondence.