Mixed-Signal Design & Verification Engineer

Mogi I/O : OTT/Podcast/Short Video Apps for you; Austin (TX); On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

H1B/EAD sponsorship likely

Job summary

A technology firm located in Austin, Texas, seeks a Mixed-Signal Design & Verification Engineer with over 5 years of mixed-signal verification experience. The ideal candidate will perform behavioral modeling for analog designs, conduct dynamic verification, and collaborate with cross-functional teams to validate advanced DSP solutions. This opportunity offers a full-time, onsite role in a well-funded startup environment.

Qualifications

• 5+ years of mixed-signal verification experience.
• Strong background in behavioral modeling for analog-to-digital verification.
• Hands-on Verilog/SystemVerilog verification coding.

Responsibilities

• Perform behavioral modeling of analog designs for digital verification.
• Conduct mixed-signal dynamic verification using chip-level digital design tools.
• Collaborate with teams to validate high-speed designs.

Skills

Mixed-signal verification

Behavioral Modelling (BM)

Verilog/SystemVerilog coding

Familiarity with Virtuoso Schematics

Virtuoso Schematics

Cadence/Synopsys tools

Test plans & testbench automation

Communication skills

Tools

Cadence verification tools

Synopsys verification tools

Job description

Mixed-Signal Design & Verification Engineer

3 days ago Be among the first 25 applicants

Work Type: Full-Time | Onsite (Austin, Texas)

Experience Required: 5+ Years

Employment Type: Direct Hire (Core Team, Well-Funded Startup)

Sponsorship: Likely H1B/EAD eligible

About The Client

Our client is a Series-D semiconductor innovator, specializing in programmable coherent DSP solutions powering cloud and AI infrastructure. Their breakthrough DSP technology is foundational to high-speed data center interconnects — enabling faster, more efficient cloud and AI communications. Backed by $180MM investment from Kleiner Perkins, Spark Capital, Mayfield, and Fidelity, this firm is out of stealth and scaling rapidly to support the future of AI-driven connectivity.

Job Overview

The role focuses on mixed-signal verification for advanced DSP-based communication and AI interconnect chips. You’ll develop behavioral models for analog blocks, run mixed-signal dynamic verification, and collaborate with world‑class analog and digital design teams to validate next‑gen coherent DSP solutions.

Key Responsibilities

• Perform behavioral modeling (BM) of analog designs to enable digital verification.
• Conduct mixed-signal dynamic verification (without AMS) using chip-level digital design tools.
• Write, simulate, and debug Verilog/SystemVerilog code for verification.
• Use Cadence Virtuoso Schematics to interface with analog designs.
• Develop test plans, verification strategies, and scalable testbench automation.
• Collaborate with DSP, analog, and digital engineering teams to validate high-speed designs.
• Present verification results, maintain coverage metrics, and ensure first-pass success in silicon.

Minimum Qualifications

• 5+ years of mixed-signal verification experience.
• Strong background in Behavioral Modelling (BM) for analog-to-digital verification.
• Hands‑on Verilog/SystemVerilog verification coding.
• Familiarity with Virtuoso Schematics. Basic understanding of analog design fundamentals.

Preferred Qualifications

• Experience with UVM (Universal Verification Methodology).
• Background working with both Synopsys and Cadence verification tools.
• Understanding of advanced verification infrastructure – simulators, waveform viewers, coverage, execution automation.
• Proven track record of building portable/scalable test environments.
• Strong communication skills; ability to write test plans, document results, present to multi‑functional teams.