Memory Interface Verification Intern — Hybrid (DDR5/DDR6)

Renesas Electronics Corp.; Georgia; Hybrid; USD 28,000 - 41,000; Part time

Job summary

Renesas Electronics Corp invites applicants for a Summer Internship (May–Aug 2027) in Duluth, GA, with a hybrid schedule (3 days on site). The role focuses on verification of DDR5 data buffers and memory interface products using UVM, building test plans, and developing reusable verification environments.

We seek full-time students (bachelor, master, or PhD) with knowledge of Verilog/SystemVerilog/UVM, strong problem-solving, and good cross-functional communication. MSEE preferred.

Qualifications

• Must be currently enrolled full-time in a university degree program pursuing a bachelor, master, or PhD (MSEE preferred).
• Must not graduate before September 2027.
• Familiar with Verilog, SystemVerilog, and UVM concepts.

Responsibilities

• Drive memory interface products verification, including strategy, test plans, coverage and tests.
• Develop and quality control a verification test plan.
• Collaborate with design team to ensure testability and requirement conformance.
• Improve verification processes for quality and efficiency.
• Monitor design verification coverage and report status to management.

Skills

Problem-solving

Written and verbal communication

Teamwork

Education

Enrollment in university degree program (bachelor/master/PhD)

Tools

Verilog

SystemVerilog

UVM

Job description

Renesas Electronics Corp invites applicants for a Summer Internship (May–Aug 2027) in Duluth, GA, with a hybrid schedule (3 days on site). The role focuses on verification of DDR5 data buffers and memory interface products using UVM, building test plans, and developing reusable verification environments.

We seek full-time students (bachelor, master, or PhD) with knowledge of Verilog/SystemVerilog/UVM, strong problem-solving, and good cross-functional communication. MSEE preferred.