Memory IC Design Engineer – In-Memory Computing

TetraMem INC; Fremont (CA); On-site; USD 100,000 - 150,000; Full time

Benefits offered by this job

Medical Benefits

401(k) Plan

Professional PTO

Job summary

TetraMem INC, located in Fremont, California, is seeking to hire an experienced engineer to design memory IC projects from concept to tape-out. Candidates should have an MS or PhD in Electrical Engineering with a strong emphasis on CMOS memory.

The ideal applicant will have 5+ years of experience in circuit design, familiarity with EDA tools such as Synopsys and Cadence, and a solid understanding of memory architecture.

This position offers a competitive compensation package, including medical benefits and a 401(k) plan.

Qualifications

• 5+ years of experience in circuit design in advanced CMOS processes.
• Successful tape-out experience with leading foundries.
• Experience in memory circuit design (SRAM, DRAM, Flash).

Responsibilities

• Design the memory IC projects from concept to tape-out.
• Define and implement memory architectures optimizing for speed and power.
• Develop comprehensive test plans and debug issues.

Skills

Circuit design

CMOS memory

EDA tools

Memory architecture

Team collaboration

Education

MS or PhD in Electrical Engineering

Tools

Synopsys

Cadence

Mentor Graphics

Job description

TetraMem INC, located in Fremont, California, is seeking to hire an experienced engineer to design memory IC projects from concept to tape-out. Candidates should have an MS or PhD in Electrical Engineering with a strong emphasis on CMOS memory.

The ideal applicant will have 5+ years of experience in circuit design, familiarity with EDA tools such as Synopsys and Cadence, and a solid understanding of memory architecture.

This position offers a competitive compensation package, including medical benefits and a 401(k) plan.