Memory Designer

Qualcomm; San Diego (CA); On-site; USD 164,000 - 246,000; Full time

Benefits offered by this job

Competitive annual discretionary bonus

Annual RSU grants

Comprehensive benefits package

Job summary

Qualcomm is seeking a talented engineer in San Diego to join the Memory IP team, focusing on designing low-power, high-performance embedded memory circuits. In this role, you’ll collaborate with various teams to ensure top performance of Snapdragon products.

Ideal candidates should have a degree in Science or Engineering with relevant ASIC design experience, alongside familiarity with memory design and physical implementation. Competitive pay range is $164,000 - $246,000, with additional benefits including bonuses and RSUs.

Qualifications

• 2+ years of academic or professional experience designing embedded memories for SoC applications.
• Knowledge of CPU L1/L2 cache design, compiler SRAM/Register File architectures.
• Understanding of high-performance and low-power design features and techniques.

Responsibilities

• Develop custom digital circuits for high-speed and low-power SRAM designs.
• Perform schematic capture and simulation of major blocks.
• Collaborate with the CAD team for full verification.

Skills

Designing embedded memories for SoC applications

CPU L1/L2 cache design

Advanced custom circuit implementations

Variation-aware design in nanometer CMOS

Physical implementation impact on circuit performance

Education

Bachelor's degree in Science or Engineering

Master's degree in Science or Engineering

PhD in Science or Engineering

Job description

Company

Qualcomm Atheros, Inc.

Location

San Diego, CA

Job Area

Engineering Group > ASICS Engineering

Job Description

This position involves designing and implementing low‑power, high‑performance, area‑efficient embedded memory circuits and architectures. As part of the Memory IP team, you will transform innovative ideas into reality in Qualcomm’s Snapdragon products, influencing CPU, GPU, Modem, NSP, and Camera designs.

Education

• Master’s degree in Science or Engineering (Entry Level)
• PhD in Science or Engineering (Entry Level)

Responsibilities

• Develop custom digital circuits for high‑speed and low‑power SRAM designs.
• Perform schematic capture, simulation of major blocks, and margin verifications.
• Plan and supervise layout.
• Collaborate with the CAD team for full verification and model generation.
• Work with SoC teams (CPU, GPU, Modem, etc.) to define memory PPA targets.

Qualifications

• 2+ years of academic or professional experience designing embedded memories for SoC applications.
• Knowledge of CPU L1/L2 cache design, compiler SRAM/Register File architectures, and advanced custom circuit implementations.
• Understanding of high‑performance and low‑power design features and techniques.
• Knowledge of semiconductor device fundamentals.
• Familiarity with variation‑aware design in nanometer CMOS and FinFET technology nodes.
• Experience with tight pitch‑matched memory layout designs.
• Strong understanding of physical implementation impact on circuit performance.

Minimum Qualifications

• Bachelor’s degree in Science or Engineering and 6+ years of ASIC design, verification, validation, or integration experience.
• Master’s degree in Science or Engineering and 5+ years of ASIC design, verification, validation, or integration experience.
• PhD in Science or Engineering and 4+ years of ASIC design, verification, validation, or integration experience.

Pay Range and Other Compensation & Benefits

Pay range: $164,000.00 - $246,000.00

Additional compensation includes a competitive annual discretionary bonus program and annual RSU grants (for eligible employees). Qualcomm also offers a comprehensive benefits package supporting employees at work, at home, and at play.

EEO Statement

Qualcomm is an equal‑opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.