Memory Design Engineer: Datapath & IO

Micron Technology, Inc; San Jose (CA); On-site; USD 83,000 - 198,000; Full time

Job summary

Micron Technology, Inc. in San Jose, CA seeks a New College Grad Design Engineer to contribute to datapath circuit design for NAND flash memory, including layout, verification, and performance optimization.

You will collaborate with engineers on project timelines and be involved in design planning and validation. The role emphasizes learning and applying new specs for speed and power, with opportunities to leverage AI-assisted workflows.

Qualifications

• BS or MS in Electrical Engineering with 0–2 years of full-time experience in semiconductor manufacturing.
• Understanding of physical design flows, high-speed IO performance, power and area optimization, and chip architecture/floorplan.
• Demonstrated ability to participate in complex design projects and communicate progress effectively.

Responsibilities

• Manage major IO/datapath blocks to meet specifications and verify functionality and performance.
• Model parasitics and review layout to improve area and power efficiency.
• Collaborate with project teams on block interfaces and silicon experiments; implement fixes for yield improvements.
• Document final results and support AI-assisted workflow acceleration.

Education

BS or MS in Electrical Engineering

0-2 years of experience

Tools

AI tools

Job description

Micron Technology, Inc. in San Jose, CA seeks a New College Grad Design Engineer to contribute to datapath circuit design for NAND flash memory, including layout, verification, and performance optimization.

You will collaborate with engineers on project timelines and be involved in design planning and validation. The role emphasizes learning and applying new specs for speed and power, with opportunities to leverage AI-assisted workflows.