Memory Architect: AI Hardware Memory Strategy & Optimization

Hewlett Packard Enterprise

Spring (TX)

On-site

USD 147,050 - 230,850

Full time

14 days+

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Benefits offered by this job

Health insurance
Dental insurance
Vision insurance
Parental leave
Holidays
Paid vacation

Job summary

Hewlett Packard Enterprise is seeking a Memory Architect in Spring, TX to lead memory architecture and placement decisions for AI PC designs. You will analyze bandwidth, latency, and cache efficiency while guiding cross-functional teams across silicon, firmware, and OS.

The role emphasizes optimizing memory configurations and measuring product performance. The ideal candidate has deep memory design experience, FPGA familiarity, and a background in electrical engineering.

Qualifications

  • Memory architectures & dependencies analysis for AI PC designs.
  • Experience with memory placements, workload optimizations, and tradeoff analysis.

Responsibilities

  • Drive footprint optimization vs bandwidth/latency tradeoffs.
  • Model workload sensitivity (latency, bandwidth, cache efficiency).
  • Optimize for AI, graphics, and productivity workloads.
  • Collaborate with silicon, firmware, and OS teams on memory architectures and design.
  • Review designs for compliance with standards and track performance metrics.

Skills

Memory design
Hardware design
Hardware architecture
FPGA
Computer engineering
Computer science
Debugging
Electrical engineering
Electronic engineering
Physics
PCB design
Schematic capture
Systems design
MATLAB
Printed circuit board
Vverifications
Oscilloscope

Education

Electrical Engineering degree

Tools

Oscilloscope
MATLAB

Job description

Hewlett Packard Enterprise is seeking a Memory Architect in Spring, TX to lead memory architecture and placement decisions for AI PC designs. You will analyze bandwidth, latency, and cache efficiency while guiding cross-functional teams across silicon, firmware, and OS.

The role emphasizes optimizing memory configurations and measuring product performance. The ideal candidate has deep memory design experience, FPGA familiarity, and a background in electrical engineering.

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