AI Memory & Storage Architect for Data Placement

Hewlett Packard Co.; Texas; On-site; USD 190,000 - 274,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

Disability insurance

Employee assistance program

Flexible spending account

Life insurance

Parental leave

Paid holidays

Vacation and sick leave

Job summary

HP, Inc. seeks a Distinguished Technologist to define and optimize how memory and storage are used as a unified data hierarchy for AI workloads.

You will map data placement policies, optimize paging, and align hardware strategies with software teams to maximize performance across AI inference and training. The role requires deep expertise in memory/storage architecture, FPGA/ASIC awareness, and collaboration with multiple engineering and product teams to drive long-term roadmaps and breakthrough

Qualifications

• Four-year or graduate degree in Electrical Engineering, or related discipline or demonstrated competence.
• Typically has 12+ years of work experience in electrical design and related fields.
• Knowledge of memory design, FPGA, and hardware architecture.
• Strong communication and cross-functional collaboration.
• Experience with MATLAB, oscilloscopes, PCB design, and simulations.

Responsibilities

• Architect memory/storage hierarchy and define data placement policies across tiers.
• Collaborate with SW and OS/runtime teams to optimize AI inference/training performance.
• Develop technology roadmaps and communicate strategy to executive staff and partners.
• Mentor staff and contribute to leadership development and design reviews.

Skills

Memory design

Computer Engineering

Computer Science

Debugging

Electrical Engineering

Electronic Engineering

FPGA

Hardware Architecture

Hardware Design

MATLAB

Oscilloscope

Printed Circuit Board

Schematic Capture

Simulations

Systems Design

Education

Electrical Engineering degree

Job description

HP, Inc. seeks a Distinguished Technologist to define and optimize how memory and storage are used as a unified data hierarchy for AI workloads.

You will map data placement policies, optimize paging, and align hardware strategies with software teams to maximize performance across AI inference and training. The role requires deep expertise in memory/storage architecture, FPGA/ASIC awareness, and collaboration with multiple engineering and product teams to drive long-term roadmaps and breakthrough