Mac Systems PDN Power Integrity Engineer

Apple Inc.; Cupertino (CA); On-site; USD 120,000 - 190,000; Full time

Job summary

Apple Inc.’s Mac organization is seeking a Systems Power Integrity Engineer to support PDN design, analysis and validation for Mac and Accessory products. You will develop impedance targets, perform transient droop and stability analyses, and verify power integrity with lab measurements.

You will collaborate with silicon, packaging and HW validation teams, guide layout strategies, and develop test suites to evaluate design margins across power domains throughout the product lifecycle.

Qualifications

• M.S. degree with 4–7 years relevant work experience.
• Proven technical understanding of power supply architectures covering voltage regulator technologies, PDN modeling, PCB design practices and trade-offs.
• Skills with tools for 2.5D/3D full-wave and quasi-static analysis (PowerSI, SIWave, HFSS, etc.).
• Experience with transient droop analysis using SPICE-like models (HSPICE, Spectre, AMS, Simplis).
• Understanding of die-package-board PDN co-design constraints.

Responsibilities

• Support system-level PDN design, analysis and validation for Mac and Accessory products.
• Develop impedance targets, transient droop, and phase-margin/stability analyses.
• Collaborate with silicon, packaging, HW validation, and system teams on component selections and layout guidelines.
• Create test suites for system-level validation across power domains.

Skills

PDN design

Power integrity

HSPICE/Spectre

Cadence tools

Programming (Python/MATLAB)

Cross-functional collaboration

Education

M.S. degree in a relevant field

Tools

PowerSI

SIWave

Sentinel-PI

nSys

HFSS

nWave

Q3D

nApex

Job description

Apple Inc.’s Mac organization is seeking a Systems Power Integrity Engineer to support PDN design, analysis and validation for Mac and Accessory products. You will develop impedance targets, perform transient droop and stability analyses, and verify power integrity with lab measurements.

You will collaborate with silicon, packaging and HW validation teams, guide layout strategies, and develop test suites to evaluate design margins across power domains throughout the product lifecycle.