Power Integrity Engineer

Apple; United States; On-site; USD 150,000 - 230,000; Full time

Job summary

Apple is seeking a dedicated SoC Power Integrity Engineer to define and drive power delivery architectures for compute and connectivity SoCs used in iPhone, iPad, and other devices. You will model, simulate, and verify PI solutions across die, package, and system levels, coordinating with silicon, package, and board teams to meet stringent impedance and noise targets.

The role requires a strong background in PI/SI, PDN modeling, and lab validation, with proficiency in Python and hands-on lab

Qualifications

• BS degree and 10+ years of relevant industry experience.
• MS/PhD in Power/Signal Integrity, Power Electronics, EM, Microwave, or Analog/RF circuit design.

Responsibilities

• Define PDN architecture and design for varying power/noise specs.
• Model, simulate, and characterize PDN from die to VR, package, board and system levels.
• Lead end-to-end PI studies to meet impedance, droop and noise specs.
• Provide feedback to silicon, package, and system teams and drive feasibility studies.

Skills

Power Integrity

PDN Modeling

Python

Lab Measurements

Cross-functional Teams

Education

BS degree

MS/PhD in Power/Si/Analog

Tools

VNA

Oscilloscope

Spectrum Analyzer

EM Simulation Tools

Job description

Summary

Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for precision to work towards an outstanding result? We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for compute and connectivity SoCs used in Apple devices (iPhone/iPad/Wearable/Mac/Home/Vision etc.). You will work with cross-functional teams to drive SoC power delivery architecture, define off-die droop budgets, design and implement power delivery network (PDN) solutions end-to-end PMU/PCB/Module/PKG/Die, and verify the quality of the power integrity performance and efficiency using advanced lab measurements.

Description

• Definition of the PDN architecture and design solution space for systems across a wide range of power and noise specifications.
• Power delivery modeling, simulation, and characterization for die, package, module, board, and Voltage Regulator (VR)
• Definition of the PDN architecture and design solution space for the target system
• Broad responsibility on all SoC PI related topics, including on-die inrush, off-die droop budget, PDN signoffs, digital to analog/RF noise coupling analysis, voltage guard band, active droop mitigation etc.

Key Responsibilities

• Lead end-to-end PI studies including modeling of die/PKG/Module/PCB/PMU to meet stringent impedance, voltage droop, and noise spec
• Provide implementation guidelines and actionable feedback to silicon, package, system design and other cross-functional teams
• Drive feasibility study for silicon floorplan, advanced droop mitigation schemes, voltage regulator modeling and tuning, system mockup design etc.
• Perform model to hardware correlation on component/module- and product/system-level

Minimum Qualifications

BS and 10 +years of relevant industry experience

Preferred Qualifications

• M.S. or Ph.D. with academic background in Power/Signal Integrity, Power Electronics, Electromagnetics, Microwave, and/or Analog/RF Circuit Design.
• Understanding of power supply architecture covering multi-stage voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power and high-power design methodologies.
• Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation in time-/frequency-domain.
• Proficiency in Python coding, AI/ML assisted automation experience.
• Experience in design and analysis of product power supply solution.
• Deep understanding of Voltage Regulator design principles and electrical performance in the system environment.
• Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory.
• Preferably working knowledge on analog/RF/wireless noise coupling and sensitivity
• Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer.
• Ability to work and communicate efficiently in cross-functional teams.