LEO Space Avionics Digital Design Engineer

Espace; Saratoga (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

E-Space in Saratoga, CA is seeking an avionics design engineer to lead schematic design and component selection for digital space-grade boards, from concept through flight qualification. You will design high-speed interfaces (PCIe, JESD, DDR4/DDR5), develop clocking architectures, perform power budgeting, and apply radiation-tolerant design techniques, collaborating with FPGA teams.

This full-time exempt role offers the chance to contribute to cutting-edge LEO satellite tech, with a flexible

Qualifications

• Experience with satellite or spacecraft avionics design and qualification.
• Background in non-volatile memory technologies and in-system programming.
• Exposure to power supply design and power integrity analysis for digital boards.
• Experience with radiation reliability and single-event effects mitigation at the board level.
• Familiarity with signal integrity simulation tools like HyperLynx, Ansys, ADS.

Responsibilities

• Own schematic design and component selection for digital avionics boards.
• Design high-speed interfaces (PCIe, JESD) and DDR4/DDR5 memory interfaces.
• Develop clocking architectures including PLL configuration and jitter management.
• Perform power budgeting and system-level power allocation across subsystems.
• Apply radiation-tolerant design techniques including SEU/SEE mitigation.
• Collaborate with FPGA engineers on support circuitry design and power/layout requirements.
• Drive board bring-up activities including configuration and verification.
• Participate in design reviews with RF, power, thermal, and mechanical teams.

Skills

Satellite avionics design

Memory technologies (Flash/MRAM/FRAM)

Power integrity analysis

Radiation hardening / SEE mitigation

Signal integrity tools familiarity

Tools

Altium Designer

HyperLynx SI/PI

ADS/Ansys/SPICE simulations

FPGA toolchains

Job description

E-Space in Saratoga, CA is seeking an avionics design engineer to lead schematic design and component selection for digital space-grade boards, from concept through flight qualification. You will design high-speed interfaces (PCIe, JESD, DDR4/DDR5), develop clocking architectures, perform power budgeting, and apply radiation-tolerant design techniques, collaborating with FPGA teams.

This full-time exempt role offers the chance to contribute to cutting-edge LEO satellite tech, with a flexible