LEO Satellite ASIC Verification Engineer

Amazon

San Diego (CA)

On-site

USD 123,000 - 170,000

Full time

6 days ago
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Job summary

Amazon Kuiper Manufacturing Enterprises LLC in San Diego seeks engineers to define and implement the digital chip SOCs for communications via Low Earth Orbit satellites. You will develop verification environments, write tests in C/C++ for embedded CPUs, and collaborate on system-level verification using UVM and DPI-C across FPGA and emulation platforms.

The role emphasizes automated regressions, test bench development, and close coordination with design and systems teams to ensure functional

Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering.
  • 2+ years in verification preferably in communication systems.
  • 1+ years in UVM, C/C++ and scripting.

Responsibilities

  • Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models.
  • Develop detailed test plans and write tests, run regressions, collect coverage matrices and report progress to the program.
  • Write tests in C/C++ to execute on embedded CPU.
  • Develop tests for FPGA and emulation platforms.
  • Run formal verification of complex blocks to ensure functional correctness.
  • Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, System C and DPI-C.
  • Develop a highly automated environment to run regressions that can be used to make builds and maintain organization of the database.

Skills

Verification
UVM
C/C++
Scripting
Embedded systems

Education

Bachelor's degree in CS/CE/EE

Job description

Amazon Kuiper Manufacturing Enterprises LLC in San Diego seeks engineers to define and implement the digital chip SOCs for communications via Low Earth Orbit satellites. You will develop verification environments, write tests in C/C++ for embedded CPUs, and collaborate on system-level verification using UVM and DPI-C across FPGA and emulation platforms.

The role emphasizes automated regressions, test bench development, and close coordination with design and systems teams to ensure functional

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