Lead Verification Infrastructure Engineer

Advanced Micro Devices, Inc.; Town of Fishkill (NY); On-site; USD 120,000 - 180,000; Full time

Job summary

Advanced Micro Devices, Inc. in Fishkill, NY seeks an experienced verification engineer to lead Zen architecture verification modernization. The role focuses on developing scalable verification frameworks, reusable C++ libraries, and automation to improve DV productivity across CPU programs.

You will collaborate with CPU design, architecture, and CAD teams, mentor engineers, and drive infrastructure roadmaps from concept through product execution in a fast-paced, collaborative environment.

Qualifications

• Experience in CPU/SoC/IP DV with modern DV methodologies.
• Proven ability to develop verification infrastructure and reusable libraries in C++.
• Experience with stimulus generation, model checking, and verification automation.
• Strong knowledge of testbench architecture and verification scalability.

Responsibilities

• Lead the transformation and modernization of Zen architecture verification infrastructure.
• Architect, develop, and maintain reusable C++ verification libraries for stimulus generation and model checking.
• Drive productivity improvements through standardized verification frameworks and automation.
• Lead strategic infrastructure initiatives including testbench modernization.
• Collaborate with CPU design, architecture, verification, and CAD teams to deploy scalable solutions.
• Identify opportunities to improve verification efficiency and validation quality.
• Provide technical leadership and mentorship shaping future infrastructure roadmaps.

Skills

CPU DV

C++ libraries

Model checking

Testbench architecture

Education

BS/MS in CS/EE

Tools

C++

Python

Job description

Advanced Micro Devices, Inc. in Fishkill, NY seeks an experienced verification engineer to lead Zen architecture verification modernization. The role focuses on developing scalable verification frameworks, reusable C++ libraries, and automation to improve DV productivity across CPU programs.

You will collaborate with CPU design, architecture, and CAD teams, mentor engineers, and drive infrastructure roadmaps from concept through product execution in a fast-paced, collaborative environment.